forked from OSchip/llvm-project
Use getConstantOperandAPInt instead of getConstantOperandVal for comparisons.
getConstantOperandAPInt avoids any large integer issues - these are unlikely but the fuzzers do like to mess around..... llvm-svn: 364564
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0627b09863
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@ -7359,7 +7359,7 @@ static SDValue LowerBuildVectorv4x32(SDValue Op, SelectionDAG &DAG,
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SDValue SrcVector = Current->getOperand(0);
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if (!V1.getNode())
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V1 = SrcVector;
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CanFold = (SrcVector == V1) && (Current.getConstantOperandVal(1) == i);
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CanFold = (SrcVector == V1) && (Current.getConstantOperandAPInt(1) == i);
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}
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if (!CanFold)
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@ -38723,14 +38723,14 @@ static SDValue combineOr(SDNode *N, SelectionDAG &DAG,
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SDValue ShMsk0;
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if (ShAmt0.getOpcode() == ISD::AND &&
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isa<ConstantSDNode>(ShAmt0.getOperand(1)) &&
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ShAmt0.getConstantOperandVal(1) == (Bits - 1)) {
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ShAmt0.getConstantOperandAPInt(1) == (Bits - 1)) {
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ShMsk0 = ShAmt0;
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ShAmt0 = ShAmt0.getOperand(0);
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}
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SDValue ShMsk1;
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if (ShAmt1.getOpcode() == ISD::AND &&
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isa<ConstantSDNode>(ShAmt1.getOperand(1)) &&
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ShAmt1.getConstantOperandVal(1) == (Bits - 1)) {
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ShAmt1.getConstantOperandAPInt(1) == (Bits - 1)) {
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ShMsk1 = ShAmt1;
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ShAmt1 = ShAmt1.getOperand(0);
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}
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@ -38771,7 +38771,7 @@ static SDValue combineOr(SDNode *N, SelectionDAG &DAG,
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SDValue ShAmt1Op1 = ShAmt1.getOperand(1);
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if (ShAmt1Op1.getOpcode() == ISD::AND &&
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isa<ConstantSDNode>(ShAmt1Op1.getOperand(1)) &&
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ShAmt1Op1.getConstantOperandVal(1) == (Bits - 1)) {
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ShAmt1Op1.getConstantOperandAPInt(1) == (Bits - 1)) {
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ShMsk1 = ShAmt1Op1;
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ShAmt1Op1 = ShAmt1Op1.getOperand(0);
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}
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@ -38797,7 +38797,7 @@ static SDValue combineOr(SDNode *N, SelectionDAG &DAG,
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(ShAmt1Op0 == ShAmt0 || ShAmt1Op0 == ShMsk0)) {
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if (Op1.getOpcode() == InnerShift &&
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isa<ConstantSDNode>(Op1.getOperand(1)) &&
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Op1.getConstantOperandVal(1) == 1) {
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Op1.getConstantOperandAPInt(1) == 1) {
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return GetFunnelShift(Op0, Op1.getOperand(0), ShAmt0);
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}
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// Test for ADD( Y, Y ) as an equivalent to SHL( Y, 1 ).
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@ -38845,7 +38845,7 @@ static SDValue foldXorTruncShiftIntoCmp(SDNode *N, SelectionDAG &DAG) {
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// Make sure the shift amount extracts the sign bit.
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if (!isa<ConstantSDNode>(Shift.getOperand(1)) ||
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Shift.getConstantOperandVal(1) != ShiftTy.getSizeInBits() - 1)
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Shift.getConstantOperandAPInt(1) != (ShiftTy.getSizeInBits() - 1))
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return SDValue();
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// Create a greater-than comparison against -1.
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@ -43454,10 +43454,10 @@ static SDValue combineInsertSubvector(SDNode *N, SelectionDAG &DAG,
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// least as large as the original insertion. Just insert the original
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// subvector into a zero vector.
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if (SubVec.getOpcode() == ISD::EXTRACT_SUBVECTOR && IdxVal == 0 &&
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SubVec.getConstantOperandVal(1) == 0 &&
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SubVec.getConstantOperandAPInt(1) == 0 &&
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SubVec.getOperand(0).getOpcode() == ISD::INSERT_SUBVECTOR) {
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SDValue Ins = SubVec.getOperand(0);
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if (Ins.getConstantOperandVal(2) == 0 &&
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if (Ins.getConstantOperandAPInt(2) == 0 &&
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ISD::isBuildVectorAllZeros(Ins.getOperand(0).getNode()) &&
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Ins.getOperand(1).getValueSizeInBits() <= SubVecVT.getSizeInBits())
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return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, OpVT,
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