diff --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp b/llvm/utils/TableGen/AsmWriterEmitter.cpp
index 7671efdde0a3..0ef5a93d569f 100644
--- a/llvm/utils/TableGen/AsmWriterEmitter.cpp
+++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp
@@ -464,7 +464,7 @@ static void
 emitRegisterNameString(raw_ostream &O, StringRef AltName,
   const std::vector<CodeGenRegister*> &Registers) {
   StringToOffsetTable StringTable;
-  O << "  static const uint16_t RegAsmOffset" << AltName << "[] = {\n    ";
+  O << "  static const unsigned RegAsmOffset" << AltName << "[] = {\n    ";
   for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
     const CodeGenRegister &Reg = *Registers[i];
 
@@ -510,7 +510,7 @@ emitRegisterNameString(raw_ostream &O, StringRef AltName,
     << "  };\n"
     << "\n";
 
-  O << "  const char *const AsmStrs" << AltName << " =\n";
+  O << "  const char *AsmStrs" << AltName << " =\n";
   StringTable.EmitString(O);
   O << ";\n";
 }
@@ -544,7 +544,7 @@ void AsmWriterEmitter::EmitGetRegisterName(raw_ostream &O) {
     emitRegisterNameString(O, "", Registers);
 
   if (hasAltNames) {
-    O << "  const uint16_t *RegAsmOffset;\n"
+    O << "  const unsigned *RegAsmOffset;\n"
       << "  const char *AsmStrs;\n"
       << "  switch(AltIdx) {\n"
       << "  default: llvm_unreachable(\"Invalid register alt name index!\");\n";
@@ -586,7 +586,7 @@ void AsmWriterEmitter::EmitGetInstructionName(raw_ostream &O) {
   << "  assert(Opcode < " << NumberedInstructions.size()
   << " && \"Invalid instruction number!\");\n"
   << "\n"
-  << "  static const uint16_t InstAsmOffset[] = {";
+  << "  static const unsigned InstAsmOffset[] = {";
   for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) {
     const CodeGenInstruction &Inst = *NumberedInstructions[i];
 
@@ -602,7 +602,7 @@ void AsmWriterEmitter::EmitGetInstructionName(raw_ostream &O) {
   << "  };\n"
   << "\n";
 
-  O << "  const char *const Strs =\n";
+  O << "  const char *Strs =\n";
   StringTable.EmitString(O);
   O << ";\n";