forked from OSchip/llvm-project
AVX-512: Truncating store for i1 vectors
Implemented truncstore for KNL and skylake-avx512. Covered vectors from v2i1 to v64i1. We save the value in bits (not in bytes) - v32i1 is saved in 4 bytes. Differential Revision: http://reviews.llvm.org/D18740 llvm-svn: 265283
This commit is contained in:
Elena Demikhovsky
parent
8e65f8ddfd
commit
e99c561391
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@ -637,6 +637,14 @@ public:
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getTruncStoreAction(ValVT.getSimpleVT(), MemVT.getSimpleVT()) == Legal;
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}
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/// Return true if the specified store with truncation has solution on this
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/// target.
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bool isTruncStoreLegalOrCustom(EVT ValVT, EVT MemVT) const {
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return isTypeLegal(ValVT) && MemVT.isSimple() &&
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(getTruncStoreAction(ValVT.getSimpleVT(), MemVT.getSimpleVT()) == Legal ||
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getTruncStoreAction(ValVT.getSimpleVT(), MemVT.getSimpleVT()) == Custom);
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}
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/// Return how the indexed load should be treated: either it is legal, needs
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/// to be promoted to a larger size, needs to be expanded to some other code
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/// sequence, or the target has a custom expander for it.
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@ -1394,6 +1394,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
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setLoadExtAction(ISD::SEXTLOAD, VT, MaskVT, Custom);
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setLoadExtAction(ISD::ZEXTLOAD, VT, MaskVT, Custom);
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setLoadExtAction(ISD::EXTLOAD, VT, MaskVT, Custom);
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setTruncStoreAction(VT, MaskVT, Custom);
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}
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setOperationAction(ISD::FADD, MVT::v16f32, Legal);
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setOperationAction(ISD::FSUB, MVT::v16f32, Legal);
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@ -16106,6 +16107,65 @@ static SDValue LowerSIGN_EXTEND(SDValue Op, const X86Subtarget &Subtarget,
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return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpHi);
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}
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// Lower truncating store. We need a special lowering to vXi1 vectors
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static SDValue LowerTruncatingStore(SDValue StOp, const X86Subtarget &Subtarget,
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SelectionDAG &DAG) {
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StoreSDNode *St = cast<StoreSDNode>(StOp.getNode());
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SDLoc dl(St);
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EVT MemVT = St->getMemoryVT();
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assert(St->isTruncatingStore() && "We only custom truncating store.");
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assert(MemVT.isVector() && MemVT.getVectorElementType() == MVT::i1 &&
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"Expected truncstore of i1 vector");
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SDValue Op = St->getValue();
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MVT OpVT = Op.getValueType().getSimpleVT();
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unsigned NumElts = OpVT.getVectorNumElements();
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if ((Subtarget.hasVLX() && Subtarget.hasBWI() && Subtarget.hasDQI()) ||
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NumElts == 16) {
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// Truncate and store - everything is legal
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Op = DAG.getNode(ISD::TRUNCATE, dl, MemVT, Op);
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if (MemVT.getSizeInBits() < 8)
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Op = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, MVT::v8i1,
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DAG.getUNDEF(MVT::v8i1), Op,
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DAG.getIntPtrConstant(0, dl));
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return DAG.getStore(St->getChain(), dl, Op, St->getBasePtr(),
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St->getMemOperand());
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}
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// A subset, assume that we have only AVX-512F
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if (NumElts <= 8) {
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if (NumElts < 8) {
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// Extend to 8-elts vector
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MVT ExtVT = MVT::getVectorVT(OpVT.getScalarType(), 8);
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Op = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ExtVT,
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DAG.getUNDEF(ExtVT), Op, DAG.getIntPtrConstant(0, dl));
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}
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Op = DAG.getNode(ISD::TRUNCATE, dl, MVT::v8i1, Op);
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return DAG.getStore(St->getChain(), dl, Op, St->getBasePtr(),
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St->getMemOperand());
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}
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// v32i8
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assert(OpVT == MVT::v32i8 && "Unexpected operand type");
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// Divide the vector into 2 parts and store each part separately
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SDValue Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v16i8, Op,
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DAG.getIntPtrConstant(0, dl));
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Lo = DAG.getNode(ISD::TRUNCATE, dl, MVT::v16i1, Lo);
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SDValue BasePtr = St->getBasePtr();
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SDValue StLo = DAG.getStore(St->getChain(), dl, Lo, BasePtr,
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St->getMemOperand());
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SDValue Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v16i8, Op,
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DAG.getIntPtrConstant(16, dl));
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Hi = DAG.getNode(ISD::TRUNCATE, dl, MVT::v16i1, Hi);
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SDValue BasePtrHi =
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DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
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DAG.getConstant(2, dl, BasePtr.getValueType()));
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SDValue StHi = DAG.getStore(St->getChain(), dl, Hi,
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BasePtrHi, St->getMemOperand());
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return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, StLo, StHi);
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}
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static SDValue LowerExtended1BitVectorLoad(SDValue Op,
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const X86Subtarget &Subtarget,
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SelectionDAG &DAG) {
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@ -21444,6 +21504,7 @@ SDValue X86TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
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case ISD::GC_TRANSITION_START:
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return LowerGC_TRANSITION_START(Op, DAG);
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case ISD::GC_TRANSITION_END: return LowerGC_TRANSITION_END(Op, DAG);
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case ISD::STORE: return LowerTruncatingStore(Op, Subtarget, DAG);
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}
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}
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@ -28021,7 +28082,7 @@ static SDValue combineStore(SDNode *N, SelectionDAG &DAG,
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// vpmovqb, vpmovqw, vpmovqd, vpmovdb, vpmovdw
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// are designated for truncate store.
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// In this case we don't need any further transformations.
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if (TLI.isTruncStoreLegal(VT, StVT))
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if (TLI.isTruncStoreLegalOrCustom(VT, StVT))
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return SDValue();
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// From, To sizes and ElemCount must be pow of two
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@ -521,17 +521,9 @@ define <32 x i16> @test21(<32 x i16> %x , <32 x i1> %mask) nounwind readnone {
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define void @test22(<4 x i1> %a, <4 x i1>* %addr) {
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; KNL-LABEL: test22:
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; KNL: ## BB#0:
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; KNL-NEXT: vpextrd $3, %xmm0, %eax
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; KNL-NEXT: andl $1, %eax
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; KNL-NEXT: movb %al, (%rdi)
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; KNL-NEXT: vpextrd $2, %xmm0, %eax
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; KNL-NEXT: andl $1, %eax
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; KNL-NEXT: movb %al, (%rdi)
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; KNL-NEXT: vpextrd $1, %xmm0, %eax
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; KNL-NEXT: andl $1, %eax
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; KNL-NEXT: movb %al, (%rdi)
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; KNL-NEXT: vmovd %xmm0, %eax
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; KNL-NEXT: andl $1, %eax
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; KNL-NEXT: vpslld $31, %ymm0, %ymm0
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; KNL-NEXT: vptestmd %zmm0, %zmm0, %k0
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; KNL-NEXT: kmovw %k0, %eax
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; KNL-NEXT: movb %al, (%rdi)
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; KNL-NEXT: retq
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;
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@ -548,11 +540,9 @@ define void @test22(<4 x i1> %a, <4 x i1>* %addr) {
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define void @test23(<2 x i1> %a, <2 x i1>* %addr) {
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; KNL-LABEL: test23:
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; KNL: ## BB#0:
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; KNL-NEXT: vpextrq $1, %xmm0, %rax
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; KNL-NEXT: andl $1, %eax
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; KNL-NEXT: movb %al, (%rdi)
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; KNL-NEXT: vmovq %xmm0, %rax
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; KNL-NEXT: andl $1, %eax
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; KNL-NEXT: vpsllq $63, %zmm0, %zmm0
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; KNL-NEXT: vptestmq %zmm0, %zmm0, %k0
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; KNL-NEXT: kmovw %k0, %eax
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; KNL-NEXT: movb %al, (%rdi)
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; KNL-NEXT: retq
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;
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@ -596,11 +586,9 @@ define void @store_v2i1(<2 x i1> %c , <2 x i1>* %ptr) {
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; KNL-LABEL: store_v2i1:
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; KNL: ## BB#0:
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; KNL-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0
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; KNL-NEXT: vpextrq $1, %xmm0, %rax
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; KNL-NEXT: andl $1, %eax
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; KNL-NEXT: movb %al, (%rdi)
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; KNL-NEXT: vmovq %xmm0, %rax
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; KNL-NEXT: andl $1, %eax
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; KNL-NEXT: vpsllq $63, %zmm0, %zmm0
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; KNL-NEXT: vptestmq %zmm0, %zmm0, %k0
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; KNL-NEXT: kmovw %k0, %eax
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; KNL-NEXT: movb %al, (%rdi)
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; KNL-NEXT: retq
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;
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@ -621,17 +609,9 @@ define void @store_v4i1(<4 x i1> %c , <4 x i1>* %ptr) {
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; KNL: ## BB#0:
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; KNL-NEXT: vpbroadcastd {{.*}}(%rip), %xmm1
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; KNL-NEXT: vpxor %xmm1, %xmm0, %xmm0
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; KNL-NEXT: vpextrd $3, %xmm0, %eax
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; KNL-NEXT: andl $1, %eax
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; KNL-NEXT: movb %al, (%rdi)
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; KNL-NEXT: vpextrd $2, %xmm0, %eax
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; KNL-NEXT: andl $1, %eax
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; KNL-NEXT: movb %al, (%rdi)
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; KNL-NEXT: vpextrd $1, %xmm0, %eax
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; KNL-NEXT: andl $1, %eax
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; KNL-NEXT: movb %al, (%rdi)
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; KNL-NEXT: vmovd %xmm0, %eax
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; KNL-NEXT: andl $1, %eax
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; KNL-NEXT: vpslld $31, %ymm0, %ymm0
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; KNL-NEXT: vptestmd %zmm0, %zmm0, %k0
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; KNL-NEXT: kmovw %k0, %eax
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; KNL-NEXT: movb %al, (%rdi)
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; KNL-NEXT: retq
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;
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@ -1038,3 +1018,128 @@ define <64 x i8> @load_64i1(<64 x i1>* %a) {
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%c = sext <64 x i1> %b to <64 x i8>
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ret <64 x i8> %c
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}
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define void @store_8i1(<8 x i1>* %a, <8 x i1> %v) {
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; KNL-LABEL: store_8i1:
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; KNL: ## BB#0:
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; KNL-NEXT: vpmovsxwq %xmm0, %zmm0
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; KNL-NEXT: vpsllq $63, %zmm0, %zmm0
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; KNL-NEXT: vptestmq %zmm0, %zmm0, %k0
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; KNL-NEXT: kmovw %k0, %eax
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; KNL-NEXT: movb %al, (%rdi)
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; KNL-NEXT: retq
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;
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; SKX-LABEL: store_8i1:
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; SKX: ## BB#0:
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; SKX-NEXT: vpsllw $15, %xmm0, %xmm0
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; SKX-NEXT: vpmovw2m %xmm0, %k0
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; SKX-NEXT: kmovb %k0, (%rdi)
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; SKX-NEXT: retq
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store <8 x i1> %v, <8 x i1>* %a
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ret void
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}
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define void @store_8i1_1(<8 x i1>* %a, <8 x i16> %v) {
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; KNL-LABEL: store_8i1_1:
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; KNL: ## BB#0:
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; KNL-NEXT: vpmovsxwq %xmm0, %zmm0
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; KNL-NEXT: vpsllq $63, %zmm0, %zmm0
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; KNL-NEXT: vptestmq %zmm0, %zmm0, %k0
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; KNL-NEXT: kmovw %k0, %eax
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; KNL-NEXT: movb %al, (%rdi)
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; KNL-NEXT: retq
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;
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; SKX-LABEL: store_8i1_1:
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; SKX: ## BB#0:
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; SKX-NEXT: vpsllw $15, %xmm0, %xmm0
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; SKX-NEXT: vpmovw2m %xmm0, %k0
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; SKX-NEXT: kmovb %k0, (%rdi)
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; SKX-NEXT: retq
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%v1 = trunc <8 x i16> %v to <8 x i1>
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store <8 x i1> %v1, <8 x i1>* %a
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ret void
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}
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define void @store_16i1(<16 x i1>* %a, <16 x i1> %v) {
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; KNL-LABEL: store_16i1:
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; KNL: ## BB#0:
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; KNL-NEXT: vpmovsxbd %xmm0, %zmm0
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; KNL-NEXT: vpslld $31, %zmm0, %zmm0
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; KNL-NEXT: vptestmd %zmm0, %zmm0, %k0
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; KNL-NEXT: kmovw %k0, (%rdi)
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; KNL-NEXT: retq
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;
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; SKX-LABEL: store_16i1:
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; SKX: ## BB#0:
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; SKX-NEXT: vpsllw $7, %xmm0, %xmm0
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; SKX-NEXT: vpmovb2m %xmm0, %k0
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; SKX-NEXT: kmovw %k0, (%rdi)
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; SKX-NEXT: retq
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store <16 x i1> %v, <16 x i1>* %a
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ret void
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}
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define void @store_32i1(<32 x i1>* %a, <32 x i1> %v) {
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; KNL-LABEL: store_32i1:
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; KNL: ## BB#0:
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; KNL-NEXT: vextractf128 $1, %ymm0, %xmm1
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; KNL-NEXT: vpmovsxbd %xmm1, %zmm1
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; KNL-NEXT: vpslld $31, %zmm1, %zmm1
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; KNL-NEXT: vptestmd %zmm1, %zmm1, %k0
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; KNL-NEXT: kmovw %k0, 2(%rdi)
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; KNL-NEXT: vpmovsxbd %xmm0, %zmm0
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; KNL-NEXT: vpslld $31, %zmm0, %zmm0
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; KNL-NEXT: vptestmd %zmm0, %zmm0, %k0
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; KNL-NEXT: kmovw %k0, (%rdi)
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; KNL-NEXT: retq
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;
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; SKX-LABEL: store_32i1:
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; SKX: ## BB#0:
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; SKX-NEXT: vpsllw $7, %ymm0, %ymm0
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; SKX-NEXT: vpmovb2m %ymm0, %k0
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; SKX-NEXT: kmovd %k0, (%rdi)
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; SKX-NEXT: retq
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store <32 x i1> %v, <32 x i1>* %a
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ret void
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}
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define void @store_32i1_1(<32 x i1>* %a, <32 x i16> %v) {
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; KNL-LABEL: store_32i1_1:
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; KNL: ## BB#0:
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; KNL-NEXT: vpmovsxwd %ymm0, %zmm0
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; KNL-NEXT: vpmovdb %zmm0, %xmm0
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; KNL-NEXT: vpmovsxwd %ymm1, %zmm1
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; KNL-NEXT: vpmovdb %zmm1, %xmm1
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; KNL-NEXT: vpmovsxbd %xmm1, %zmm1
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; KNL-NEXT: vpslld $31, %zmm1, %zmm1
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; KNL-NEXT: vptestmd %zmm1, %zmm1, %k0
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; KNL-NEXT: kmovw %k0, 2(%rdi)
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; KNL-NEXT: vpmovsxbd %xmm0, %zmm0
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; KNL-NEXT: vpslld $31, %zmm0, %zmm0
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; KNL-NEXT: vptestmd %zmm0, %zmm0, %k0
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; KNL-NEXT: kmovw %k0, (%rdi)
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; KNL-NEXT: retq
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;
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; SKX-LABEL: store_32i1_1:
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; SKX: ## BB#0:
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; SKX-NEXT: vpsllw $15, %zmm0, %zmm0
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; SKX-NEXT: vpmovw2m %zmm0, %k0
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; SKX-NEXT: kmovd %k0, (%rdi)
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; SKX-NEXT: retq
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%v1 = trunc <32 x i16> %v to <32 x i1>
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store <32 x i1> %v1, <32 x i1>* %a
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ret void
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}
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define void @store_64i1(<64 x i1>* %a, <64 x i1> %v) {
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;
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; SKX-LABEL: store_64i1:
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; SKX: ## BB#0:
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; SKX-NEXT: vpsllw $7, %zmm0, %zmm0
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; SKX-NEXT: vpmovb2m %zmm0, %k0
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; SKX-NEXT: kmovq %k0, (%rdi)
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; SKX-NEXT: retq
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store <64 x i1> %v, <64 x i1>* %a
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ret void
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}
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@ -1,3 +1,4 @@
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; NOTE: Assertions have been autogenerated by update_llc_test_checks.py
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42
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@ -6569,393 +6570,41 @@ define <128 x i1> @test_cmp_v128i8(<128 x i8> %a0, <128 x i8> %a1) nounwind {
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; AVX512-NEXT: vpcmpgtb %ymm6, %ymm2, %ymm2
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; AVX512-NEXT: vpcmpgtb %ymm7, %ymm3, %ymm3
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; AVX512-NEXT: vextracti128 $1, %ymm3, %xmm4
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; AVX512-NEXT: vpextrb $15, %xmm4, %eax
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; AVX512-NEXT: andb $1, %al
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; AVX512-NEXT: movb %al, 12(%rdi)
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; AVX512-NEXT: vpextrb $14, %xmm4, %eax
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; AVX512-NEXT: andb $1, %al
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; AVX512-NEXT: movb %al, 12(%rdi)
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; AVX512-NEXT: vpextrb $13, %xmm4, %eax
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; AVX512-NEXT: andb $1, %al
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; AVX512-NEXT: movb %al, 12(%rdi)
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; AVX512-NEXT: vpextrb $12, %xmm4, %eax
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; AVX512-NEXT: andb $1, %al
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; AVX512-NEXT: movb %al, 12(%rdi)
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; AVX512-NEXT: vpextrb $11, %xmm4, %eax
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; AVX512-NEXT: andb $1, %al
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; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $10, %xmm4, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $9, %xmm4, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $8, %xmm4, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $7, %xmm4, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $6, %xmm4, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $5, %xmm4, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $4, %xmm4, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $3, %xmm4, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $2, %xmm4, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $1, %xmm4, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $0, %xmm4, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $15, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $14, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $13, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $12, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $11, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $10, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $9, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $8, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $7, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $6, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $5, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $4, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $3, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $2, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $1, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpextrb $0, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 12(%rdi)
|
||||
; AVX512-NEXT: vpmovsxbd %xmm4, %zmm4
|
||||
; AVX512-NEXT: vpslld $31, %zmm4, %zmm4
|
||||
; AVX512-NEXT: vptestmd %zmm4, %zmm4, %k0
|
||||
; AVX512-NEXT: kmovw %k0, 14(%rdi)
|
||||
; AVX512-NEXT: vpmovsxbd %xmm3, %zmm3
|
||||
; AVX512-NEXT: vpslld $31, %zmm3, %zmm3
|
||||
; AVX512-NEXT: vptestmd %zmm3, %zmm3, %k0
|
||||
; AVX512-NEXT: kmovw %k0, 12(%rdi)
|
||||
; AVX512-NEXT: vextracti128 $1, %ymm2, %xmm3
|
||||
; AVX512-NEXT: vpextrb $15, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $14, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $13, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $12, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $11, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $10, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $9, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $8, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $7, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $6, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $5, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $4, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $3, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $2, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $1, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $0, %xmm3, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $15, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $14, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $13, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $12, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $11, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $10, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $9, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $8, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $7, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $6, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $5, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $4, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $3, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $2, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $1, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpextrb $0, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 8(%rdi)
|
||||
; AVX512-NEXT: vpmovsxbd %xmm3, %zmm3
|
||||
; AVX512-NEXT: vpslld $31, %zmm3, %zmm3
|
||||
; AVX512-NEXT: vptestmd %zmm3, %zmm3, %k0
|
||||
; AVX512-NEXT: kmovw %k0, 10(%rdi)
|
||||
; AVX512-NEXT: vpmovsxbd %xmm2, %zmm2
|
||||
; AVX512-NEXT: vpslld $31, %zmm2, %zmm2
|
||||
; AVX512-NEXT: vptestmd %zmm2, %zmm2, %k0
|
||||
; AVX512-NEXT: kmovw %k0, 8(%rdi)
|
||||
; AVX512-NEXT: vextracti128 $1, %ymm1, %xmm2
|
||||
; AVX512-NEXT: vpextrb $15, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $14, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $13, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $12, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $11, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $10, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $9, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $8, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $7, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $6, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $5, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $4, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $3, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $2, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $1, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $0, %xmm2, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $15, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $14, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $13, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $12, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $11, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $10, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $9, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $8, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $7, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $6, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $5, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $4, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $3, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $2, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $1, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpextrb $0, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, 4(%rdi)
|
||||
; AVX512-NEXT: vpmovsxbd %xmm2, %zmm2
|
||||
; AVX512-NEXT: vpslld $31, %zmm2, %zmm2
|
||||
; AVX512-NEXT: vptestmd %zmm2, %zmm2, %k0
|
||||
; AVX512-NEXT: kmovw %k0, 6(%rdi)
|
||||
; AVX512-NEXT: vpmovsxbd %xmm1, %zmm1
|
||||
; AVX512-NEXT: vpslld $31, %zmm1, %zmm1
|
||||
; AVX512-NEXT: vptestmd %zmm1, %zmm1, %k0
|
||||
; AVX512-NEXT: kmovw %k0, 4(%rdi)
|
||||
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX512-NEXT: vpextrb $15, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $14, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $13, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $12, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $11, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $10, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $9, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $8, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $7, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $6, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $5, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $4, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $3, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $2, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $1, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $0, %xmm1, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $15, %xmm0, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $14, %xmm0, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $13, %xmm0, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $12, %xmm0, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $11, %xmm0, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $10, %xmm0, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $9, %xmm0, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $8, %xmm0, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $7, %xmm0, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $6, %xmm0, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $5, %xmm0, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $4, %xmm0, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $3, %xmm0, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $2, %xmm0, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $1, %xmm0, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpextrb $0, %xmm0, %eax
|
||||
; AVX512-NEXT: andb $1, %al
|
||||
; AVX512-NEXT: movb %al, (%rdi)
|
||||
; AVX512-NEXT: vpmovsxbd %xmm1, %zmm1
|
||||
; AVX512-NEXT: vpslld $31, %zmm1, %zmm1
|
||||
; AVX512-NEXT: vptestmd %zmm1, %zmm1, %k0
|
||||
; AVX512-NEXT: kmovw %k0, 2(%rdi)
|
||||
; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0
|
||||
; AVX512-NEXT: vpslld $31, %zmm0, %zmm0
|
||||
; AVX512-NEXT: vptestmd %zmm0, %zmm0, %k0
|
||||
; AVX512-NEXT: kmovw %k0, (%rdi)
|
||||
; AVX512-NEXT: movq %rdi, %rax
|
||||
; AVX512-NEXT: retq
|
||||
%1 = icmp sgt <128 x i8> %a0, %a1
|
||||
|
|
|
|||
Loading…
Reference in New Issue