maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Move the getInlineAsmLength virtual method from TAI to TII, where 

the only real caller (GetFunctionSizeInBytes) uses it.

The custom ARM implementation of this is basically reimplementing
an assembler poorly for negligible gain.  It should be removed 
IMNSHO, but I'll leave that to ARMish folks to decide.

llvm-svn: 77877
This commit is contained in:
Chris Lattner 2009-08-02 05:20:37 +00:00
parent ca7935d347
commit e98a3c3ca3
14 changed files with 236 additions and 218 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
llvm/include/llvm/Target/TargetAsmInfo.h
View File

@ -375,10 +375,6 @@ namespace llvm {
explicit TargetAsmInfo();
virtual ~TargetAsmInfo();
/// Measure the specified inline asm to determine an approximation of its
/// length.
virtual unsigned getInlineAsmLength(const char *Str) const;
/// getSLEB128Size - Compute the number of bytes required for a signed
/// leb128 value.
static unsigned getSLEB128Size(int Value);
@ -414,6 +410,9 @@ namespace llvm {
bool needsSet() const {
return NeedsSet;
}
unsigned getMaxInstLength() const {
return MaxInstLength;
}
const char *getPCSymbol() const {
return PCSymbol;
}

9
llvm/include/llvm/Target/TargetInstrInfo.h
View File

@ -19,6 +19,7 @@
namespace llvm {
class TargetAsmInfo;
class TargetRegisterClass;
class TargetRegisterInfo;
class LiveVariables;
@ -456,9 +457,15 @@ public:
return 0;
}
/// GetFunctionSizeInBytes - Returns the size of the specified MachineFunction.
/// GetFunctionSizeInBytes - Returns the size of the specified
/// MachineFunction.
///
virtual unsigned GetFunctionSizeInBytes(const MachineFunction &MF) const = 0;
/// Measure the specified inline asm to determine an approximation of its
/// length.
virtual unsigned getInlineAsmLength(const char *Str,
const TargetAsmInfo &TAI) const;
};
/// TargetInstrInfoImpl - This is the default implementation of

4
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
View File

@ -30,7 +30,7 @@ static cl::opt<bool>
EnableARM3Addr("enable-arm-3-addr-conv", cl::Hidden,
cl::desc("Enable ARM 2-addr to 3-addr conv"));
ARMBaseInstrInfo::ARMBaseInstrInfo(const ARMSubtarget &sti)
ARMBaseInstrInfo::ARMBaseInstrInfo()
: TargetInstrInfoImpl(ARMInsts, array_lengthof(ARMInsts)) {
}
@ -415,7 +415,7 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
default: {
// If this machine instr is an inline asm, measure it.
if (MI->getOpcode() == ARM::INLINEASM)
return TAI->getInlineAsmLength(MI->getOperand(0).getSymbolName());
return getInlineAsmLength(MI->getOperand(0).getSymbolName(), *TAI);
if (MI->isLabel())
return 0;
switch (Opc) {

3
llvm/lib/Target/ARM/ARMBaseInstrInfo.h
View File

@ -20,7 +20,6 @@
#include "llvm/Target/TargetInstrInfo.h"
namespace llvm {
class ARMSubtarget;
/// ARMII - This namespace holds all of the target specific flags that
/// instruction info tracks.
@ -160,7 +159,7 @@ namespace ARMII {
class ARMBaseInstrInfo : public TargetInstrInfoImpl {
protected:
// Can be only subclassed.
explicit ARMBaseInstrInfo(const ARMSubtarget &sti);
explicit ARMBaseInstrInfo();
public:
// Return the non-pre/post incrementing version of 'Opc'. Return 0
// if there is not such an opcode.

169
llvm/lib/Target/ARM/ARMInstrInfo.cpp
View File

@ -26,11 +26,10 @@
using namespace llvm;
ARMInstrInfo::ARMInstrInfo(const ARMSubtarget &STI)
: ARMBaseInstrInfo(STI), RI(*this, STI) {
: RI(*this, STI), Subtarget(STI) {
}
unsigned ARMInstrInfo::
getUnindexedOpcode(unsigned Opc) const {
unsigned ARMInstrInfo::getUnindexedOpcode(unsigned Opc) const {
switch (Opc) {
default: break;
case ARM::LDR_PRE:
@ -62,8 +61,7 @@ getUnindexedOpcode(unsigned Opc) const {
return 0;
}
bool ARMInstrInfo::
BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
bool ARMInstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
if (MBB.empty()) return false;
switch (MBB.back().getOpcode()) {
@ -100,3 +98,164 @@ reMaterialize(MachineBasicBlock &MBB,
MI->getOperand(0).setReg(DestReg);
MBB.insert(I, MI);
}
/// Count the number of comma-separated arguments.
/// Do not try to detect errors.
static unsigned countArguments(const char* p,
const TargetAsmInfo &TAI) {
unsigned count = 0;
while (*p && isspace(*p) && *p != '\n')
p++;
count++;
while (*p && *p!='\n' &&
strncmp(p, TAI.getCommentString(),
strlen(TAI.getCommentString())) != 0) {
if (*p==',')
count++;
p++;
}
return count;
}
/// Count the length of a string enclosed in quote characters.
/// Do not try to detect errors.
static unsigned countString(const char *p) {
unsigned count = 0;
while (*p && isspace(*p) && *p!='\n')
p++;
if (!*p || *p != '\"')
return count;
while (*++p && *p != '\"')
count++;
return count;
}
/// ARM-specific version of TargetAsmInfo::getInlineAsmLength.
unsigned ARMInstrInfo::getInlineAsmLength(const char *s,
const TargetAsmInfo &TAI) const {
// Make a lowercase-folded version of s for counting purposes.
char *q, *s_copy = (char *)malloc(strlen(s) + 1);
strcpy(s_copy, s);
for (q=s_copy; *q; q++)
*q = tolower(*q);
const char *Str = s_copy;
// Count the number of bytes in the asm.
bool atInsnStart = true;
bool inTextSection = true;
unsigned Length = 0;
for (; *Str; ++Str) {
if (atInsnStart) {
// Skip whitespace
while (*Str && isspace(*Str) && *Str != '\n')
Str++;
// Skip label
for (const char* p = Str; *p && !isspace(*p); p++)
if (*p == ':') {
Str = p+1;
while (*Str && isspace(*Str) && *Str != '\n')
Str++;
break;
}
if (*Str == 0) break;
// Ignore everything from comment char(s) to EOL
if (strncmp(Str, TAI.getCommentString(),
strlen(TAI.getCommentString())) == 0)
atInsnStart = false;
// FIXME do something like the following for non-Darwin
else if (*Str == '.' && Subtarget.isTargetDarwin()) {
// Directive.
atInsnStart = false;
// Some change the section, but don't generate code.
if (strncmp(Str, ".literal4", strlen(".literal4"))==0 ||
strncmp(Str, ".literal8", strlen(".literal8"))==0 ||
strncmp(Str, ".const", strlen(".const"))==0 ||
strncmp(Str, ".constructor", strlen(".constructor"))==0 ||
strncmp(Str, ".cstring", strlen(".cstring"))==0 ||
strncmp(Str, ".data", strlen(".data"))==0 ||
strncmp(Str, ".destructor", strlen(".destructor"))==0 ||
strncmp(Str, ".fvmlib_init0", strlen(".fvmlib_init0"))==0 ||
strncmp(Str, ".fvmlib_init1", strlen(".fvmlib_init1"))==0 ||
strncmp(Str, ".mod_init_func", strlen(".mod_init_func"))==0 ||
strncmp(Str, ".mod_term_func", strlen(".mod_term_func"))==0 ||
strncmp(Str, ".picsymbol_stub", strlen(".picsymbol_stub"))==0 ||
strncmp(Str, ".symbol_stub", strlen(".symbol_stub"))==0 ||
strncmp(Str, ".static_data", strlen(".static_data"))==0 ||
strncmp(Str, ".section", strlen(".section"))==0 ||
strncmp(Str, ".lazy_symbol_pointer", strlen(".lazy_symbol_pointer"))==0 ||
strncmp(Str, ".non_lazy_symbol_pointer", strlen(".non_lazy_symbol_pointer"))==0 ||
strncmp(Str, ".dyld", strlen(".dyld"))==0 ||
strncmp(Str, ".const_data", strlen(".const_data"))==0 ||
strncmp(Str, ".objc", strlen(".objc"))==0 || //// many directives
strncmp(Str, ".static_const", strlen(".static_const"))==0)
inTextSection=false;
else if (strncmp(Str, ".text", strlen(".text"))==0)
inTextSection = true;
// Some can't really be handled without implementing significant pieces
// of an assembler. Others require dynamic adjustment of block sizes in
// AdjustBBOffsetsAfter; it's a big compile-time speed hit to check every
// instruction in there, and none of these are currently used in the kernel.
else if (strncmp(Str, ".macro", strlen(".macro"))==0 ||
strncmp(Str, ".if", strlen(".if"))==0 ||
strncmp(Str, ".align", strlen(".align"))==0 ||
strncmp(Str, ".fill", strlen(".fill"))==0 ||
strncmp(Str, ".space", strlen(".space"))==0 ||
strncmp(Str, ".zerofill", strlen(".zerofill"))==0 ||
strncmp(Str, ".p2align", strlen(".p2align"))==0 ||
strncmp(Str, ".p2alignw", strlen(".p2alignw"))==0 ||
strncmp(Str, ".p2alignl", strlen(".p2alignl"))==0 ||
strncmp(Str, ".align32", strlen(".p2align32"))==0 ||
strncmp(Str, ".include", strlen(".include"))==0)
cerr << "Directive " << Str << " in asm may lead to invalid offsets for" <<
" constant pools (the assembler will tell you if this happens).\n";
// Some generate code, but this is only interesting in the text section.
else if (inTextSection) {
if (strncmp(Str, ".long", strlen(".long"))==0)
Length += 4*countArguments(Str+strlen(".long"), TAI);
else if (strncmp(Str, ".short", strlen(".short"))==0)
Length += 2*countArguments(Str+strlen(".short"), TAI);
else if (strncmp(Str, ".byte", strlen(".byte"))==0)
Length += 1*countArguments(Str+strlen(".byte"), TAI);
else if (strncmp(Str, ".single", strlen(".single"))==0)
Length += 4*countArguments(Str+strlen(".single"), TAI);
else if (strncmp(Str, ".double", strlen(".double"))==0)
Length += 8*countArguments(Str+strlen(".double"), TAI);
else if (strncmp(Str, ".quad", strlen(".quad"))==0)
Length += 16*countArguments(Str+strlen(".quad"), TAI);
else if (strncmp(Str, ".ascii", strlen(".ascii"))==0)
Length += countString(Str+strlen(".ascii"));
else if (strncmp(Str, ".asciz", strlen(".asciz"))==0)
Length += countString(Str+strlen(".asciz"))+1;
}
} else if (inTextSection) {
// An instruction
atInsnStart = false;
if (Subtarget.isThumb()) { // FIXME thumb2
// BL and BLX <non-reg> are 4 bytes, all others 2.
if (strncmp(Str, "blx", strlen("blx"))==0) {
const char* p = Str+3;
while (*p && isspace(*p))
p++;
if (*p == 'r' || *p=='R')
Length += 2; // BLX reg
else
Length += 4; // BLX non-reg
} else if (strncmp(Str, "bl", strlen("bl"))==0)
Length += 4; // BL
else
Length += 2; // Thumb anything else
}
else
Length += 4; // ARM
}
}
if (*Str == '\n' || *Str == TAI.getSeparatorChar())
atInsnStart = true;
}
free(s_copy);
return Length;
}

4
llvm/lib/Target/ARM/ARMInstrInfo.h
View File

@ -25,6 +25,7 @@ namespace llvm {
class ARMInstrInfo : public ARMBaseInstrInfo {
ARMRegisterInfo RI;
const ARMSubtarget &Subtarget;
public:
explicit ARMInstrInfo(const ARMSubtarget &STI);
@ -44,6 +45,9 @@ public:
void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SubIdx,
const MachineInstr *Orig) const;
virtual unsigned getInlineAsmLength(const char *Str,
const TargetAsmInfo &TAI) const;
};
}

160
llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp
View File

@ -81,165 +81,5 @@ ARMELFTargetAsmInfo::ARMELFTargetAsmInfo(const ARMBaseTargetMachine &TM):
SupportsDebugInformation = true;
}
/// Count the number of comma-separated arguments.
/// Do not try to detect errors.
static unsigned countArguments(const char* p,
const TargetAsmInfo &TAI) {
unsigned count = 0;
while (*p && isspace(*p) && *p != '\n')
p++;
count++;
while (*p && *p!='\n' &&
strncmp(p, TAI.getCommentString(),
strlen(TAI.getCommentString())) != 0) {
if (*p==',')
count++;
p++;
}
return count;
}
/// Count the length of a string enclosed in quote characters.
/// Do not try to detect errors.
static unsigned countString(const char *p) {
unsigned count = 0;
while (*p && isspace(*p) && *p!='\n')
p++;
if (!*p || *p != '\"')
return count;
while (*++p && *p != '\"')
count++;
return count;
}
/// ARM-specific version of TargetAsmInfo::getInlineAsmLength.
template <class BaseTAI>
unsigned ARMTargetAsmInfo<BaseTAI>::getInlineAsmLength(const char *s) const {
// Make a lowercase-folded version of s for counting purposes.
char *q, *s_copy = (char *)malloc(strlen(s) + 1);
strcpy(s_copy, s);
for (q=s_copy; *q; q++)
*q = tolower(*q);
const char *Str = s_copy;
// Count the number of bytes in the asm.
bool atInsnStart = true;
bool inTextSection = true;
unsigned Length = 0;
for (; *Str; ++Str) {
if (atInsnStart) {
// Skip whitespace
while (*Str && isspace(*Str) && *Str != '\n')
Str++;
// Skip label
for (const char* p = Str; *p && !isspace(*p); p++)
if (*p == ':') {
Str = p+1;
while (*Str && isspace(*Str) && *Str != '\n')
Str++;
break;
}
if (*Str == 0) break;
// Ignore everything from comment char(s) to EOL
if (strncmp(Str, BaseTAI::CommentString,
strlen(BaseTAI::CommentString)) == 0)
atInsnStart = false;
// FIXME do something like the following for non-Darwin
else if (*Str == '.' && Subtarget->isTargetDarwin()) {
// Directive.
atInsnStart = false;
// Some change the section, but don't generate code.
if (strncmp(Str, ".literal4", strlen(".literal4"))==0 ||
strncmp(Str, ".literal8", strlen(".literal8"))==0 ||
strncmp(Str, ".const", strlen(".const"))==0 ||
strncmp(Str, ".constructor", strlen(".constructor"))==0 ||
strncmp(Str, ".cstring", strlen(".cstring"))==0 ||
strncmp(Str, ".data", strlen(".data"))==0 ||
strncmp(Str, ".destructor", strlen(".destructor"))==0 ||
strncmp(Str, ".fvmlib_init0", strlen(".fvmlib_init0"))==0 ||
strncmp(Str, ".fvmlib_init1", strlen(".fvmlib_init1"))==0 ||
strncmp(Str, ".mod_init_func", strlen(".mod_init_func"))==0 ||
strncmp(Str, ".mod_term_func", strlen(".mod_term_func"))==0 ||
strncmp(Str, ".picsymbol_stub", strlen(".picsymbol_stub"))==0 ||
strncmp(Str, ".symbol_stub", strlen(".symbol_stub"))==0 ||
strncmp(Str, ".static_data", strlen(".static_data"))==0 ||
strncmp(Str, ".section", strlen(".section"))==0 ||
strncmp(Str, ".lazy_symbol_pointer", strlen(".lazy_symbol_pointer"))==0 ||
strncmp(Str, ".non_lazy_symbol_pointer", strlen(".non_lazy_symbol_pointer"))==0 ||
strncmp(Str, ".dyld", strlen(".dyld"))==0 ||
strncmp(Str, ".const_data", strlen(".const_data"))==0 ||
strncmp(Str, ".objc", strlen(".objc"))==0 || //// many directives
strncmp(Str, ".static_const", strlen(".static_const"))==0)
inTextSection=false;
else if (strncmp(Str, ".text", strlen(".text"))==0)
inTextSection = true;
// Some can't really be handled without implementing significant pieces
// of an assembler. Others require dynamic adjustment of block sizes in
// AdjustBBOffsetsAfter; it's a big compile-time speed hit to check every
// instruction in there, and none of these are currently used in the kernel.
else if (strncmp(Str, ".macro", strlen(".macro"))==0 ||
strncmp(Str, ".if", strlen(".if"))==0 ||
strncmp(Str, ".align", strlen(".align"))==0 ||
strncmp(Str, ".fill", strlen(".fill"))==0 ||
strncmp(Str, ".space", strlen(".space"))==0 ||
strncmp(Str, ".zerofill", strlen(".zerofill"))==0 ||
strncmp(Str, ".p2align", strlen(".p2align"))==0 ||
strncmp(Str, ".p2alignw", strlen(".p2alignw"))==0 ||
strncmp(Str, ".p2alignl", strlen(".p2alignl"))==0 ||
strncmp(Str, ".align32", strlen(".p2align32"))==0 ||
strncmp(Str, ".include", strlen(".include"))==0)
cerr << "Directive " << Str << " in asm may lead to invalid offsets for" <<
" constant pools (the assembler will tell you if this happens).\n";
// Some generate code, but this is only interesting in the text section.
else if (inTextSection) {
if (strncmp(Str, ".long", strlen(".long"))==0)
Length += 4*countArguments(Str+strlen(".long"), *this);
else if (strncmp(Str, ".short", strlen(".short"))==0)
Length += 2*countArguments(Str+strlen(".short"), *this);
else if (strncmp(Str, ".byte", strlen(".byte"))==0)
Length += 1*countArguments(Str+strlen(".byte"), *this);
else if (strncmp(Str, ".single", strlen(".single"))==0)
Length += 4*countArguments(Str+strlen(".single"), *this);
else if (strncmp(Str, ".double", strlen(".double"))==0)
Length += 8*countArguments(Str+strlen(".double"), *this);
else if (strncmp(Str, ".quad", strlen(".quad"))==0)
Length += 16*countArguments(Str+strlen(".quad"), *this);
else if (strncmp(Str, ".ascii", strlen(".ascii"))==0)
Length += countString(Str+strlen(".ascii"));
else if (strncmp(Str, ".asciz", strlen(".asciz"))==0)
Length += countString(Str+strlen(".asciz"))+1;
}
} else if (inTextSection) {
// An instruction
atInsnStart = false;
if (Subtarget->isThumb()) { // FIXME thumb2
// BL and BLX <non-reg> are 4 bytes, all others 2.
if (strncmp(Str, "blx", strlen("blx"))==0) {
const char* p = Str+3;
while (*p && isspace(*p))
p++;
if (*p == 'r' || *p=='R')
Length += 2; // BLX reg
else
Length += 4; // BLX non-reg
} else if (strncmp(Str, "bl", strlen("bl"))==0)
Length += 4; // BL
else
Length += 2; // Thumb anything else
}
else
Length += 4; // ARM
}
}
if (*Str == '\n' || *Str == BaseTAI::SeparatorChar)
atInsnStart = true;
}
free(s_copy);
return Length;
}
// Instantiate default implementation.
TEMPLATE_INSTANTIATION(class ARMTargetAsmInfo<TargetAsmInfo>);

2
llvm/lib/Target/ARM/ARMTargetAsmInfo.h
View File

@ -38,8 +38,6 @@ namespace llvm {
}
const ARMSubtarget *Subtarget;
virtual unsigned getInlineAsmLength(const char *Str) const;
};
EXTERN_TEMPLATE_INSTANTIATION(class ARMTargetAsmInfo<TargetAsmInfo>);

3
llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
View File

@ -22,8 +22,7 @@
using namespace llvm;
Thumb1InstrInfo::Thumb1InstrInfo(const ARMSubtarget &STI)
: ARMBaseInstrInfo(STI), RI(*this, STI) {
Thumb1InstrInfo::Thumb1InstrInfo(const ARMSubtarget &STI) : RI(*this, STI) {
}
unsigned Thumb1InstrInfo::getUnindexedOpcode(unsigned Opc) const {

3
llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
View File

@ -23,8 +23,7 @@
using namespace llvm;
Thumb2InstrInfo::Thumb2InstrInfo(const ARMSubtarget &STI)
: ARMBaseInstrInfo(STI), RI(*this, STI) {
Thumb2InstrInfo::Thumb2InstrInfo(const ARMSubtarget &STI) : RI(*this, STI) {
}
unsigned Thumb2InstrInfo::getUnindexedOpcode(unsigned Opc) const {

2
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
View File

@ -768,7 +768,7 @@ unsigned PPCInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
case PPC::INLINEASM: { // Inline Asm: Variable size.
const MachineFunction *MF = MI->getParent()->getParent();
const char *AsmStr = MI->getOperand(0).getSymbolName();
return MF->getTarget().getTargetAsmInfo()->getInlineAsmLength(AsmStr);
return getInlineAsmLength(AsmStr, *MF->getTarget().getTargetAsmInfo());
}
case PPC::DBG_LABEL:
case PPC::EH_LABEL:

25
llvm/lib/Target/TargetAsmInfo.cpp
View File

@ -103,31 +103,6 @@ TargetAsmInfo::TargetAsmInfo() {
TargetAsmInfo::~TargetAsmInfo() {
}
/// Measure the specified inline asm to determine an approximation of its
/// length.
/// Comments (which run till the next SeparatorChar or newline) do not
/// count as an instruction.
/// Any other non-whitespace text is considered an instruction, with
/// multiple instructions separated by SeparatorChar or newlines.
/// Variable-length instructions are not handled here; this function
/// may be overloaded in the target code to do that.
unsigned TargetAsmInfo::getInlineAsmLength(const char *Str) const {
// Count the number of instructions in the asm.
bool atInsnStart = true;
unsigned Length = 0;
for (; *Str; ++Str) {
if (*Str == '\n' || *Str == SeparatorChar)
atInsnStart = true;
if (atInsnStart && !isspace(*Str)) {
Length += MaxInstLength;
atInsnStart = false;
}
if (atInsnStart && strncmp(Str, CommentString, strlen(CommentString))==0)
atInsnStart = false;
}
return Length;
}
unsigned TargetAsmInfo::getULEB128Size(unsigned Value) {
unsigned Size = 0;

57
llvm/lib/Target/TargetInstrInfo.cpp
View File

@ -12,10 +12,29 @@
//===----------------------------------------------------------------------===//
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
//===----------------------------------------------------------------------===//
// TargetOperandInfo
//===----------------------------------------------------------------------===//
/// getRegClass - Get the register class for the operand, handling resolution
/// of "symbolic" pointer register classes etc. If this is not a register
/// operand, this returns null.
const TargetRegisterClass *
TargetOperandInfo::getRegClass(const TargetRegisterInfo *TRI) const {
if (isLookupPtrRegClass())
return TRI->getPointerRegClass(RegClass);
return TRI->getRegClass(RegClass);
}
//===----------------------------------------------------------------------===//
// TargetInstrInfo
//===----------------------------------------------------------------------===//
TargetInstrInfo::TargetInstrInfo(const TargetInstrDesc* Desc,
unsigned numOpcodes)
: Descriptors(Desc), NumOpcodes(numOpcodes) {
@ -44,13 +63,33 @@ bool TargetInstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
return !isPredicated(MI);
}
/// getRegClass - Get the register class for the operand, handling resolution
/// of "symbolic" pointer register classes etc. If this is not a register
/// operand, this returns null.
const TargetRegisterClass *
TargetOperandInfo::getRegClass(const TargetRegisterInfo *TRI) const {
if (isLookupPtrRegClass())
return TRI->getPointerRegClass(RegClass);
return TRI->getRegClass(RegClass);
}
/// Measure the specified inline asm to determine an approximation of its
/// length.
/// Comments (which run till the next SeparatorChar or newline) do not
/// count as an instruction.
/// Any other non-whitespace text is considered an instruction, with
/// multiple instructions separated by SeparatorChar or newlines.
/// Variable-length instructions are not handled here; this function
/// may be overloaded in the target code to do that.
unsigned TargetInstrInfo::getInlineAsmLength(const char *Str,
const TargetAsmInfo &TAI) const {
// Count the number of instructions in the asm.
bool atInsnStart = true;
unsigned Length = 0;
for (; *Str; ++Str) {
if (*Str == '\n' || *Str == TAI.getSeparatorChar())
atInsnStart = true;
if (atInsnStart && !isspace(*Str)) {
Length += TAI.getMaxInstLength();
atInsnStart = false;
}
if (atInsnStart && strncmp(Str, TAI.getCommentString(),
strlen(TAI.getCommentString())) == 0)
atInsnStart = false;
}
return Length;
}

6
llvm/lib/Target/X86/X86InstrInfo.cpp
View File

@ -2979,9 +2979,9 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI,
break;
case TargetInstrInfo::INLINEASM: {
const MachineFunction *MF = MI.getParent()->getParent();
const char *AsmStr = MI.getOperand(0).getSymbolName();
const TargetAsmInfo* AI = MF->getTarget().getTargetAsmInfo();
FinalSize += AI->getInlineAsmLength(AsmStr);
const TargetInstrInfo &TII = *MF->getTarget().getInstrInfo();
FinalSize += TII.getInlineAsmLength(MI.getOperand(0).getSymbolName(),
*MF->getTarget().getTargetAsmInfo());
break;
}
case TargetInstrInfo::DBG_LABEL: