forked from OSchip/llvm-project
Hexagon: add support for predicate-GPR copies.
llvm-svn: 175102
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@ -426,6 +426,18 @@ void HexagonInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
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BuildMI(MBB, I, DL, get(Hexagon::TFCR), DestReg).addReg(SrcReg);
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return;
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}
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if (Hexagon::PredRegsRegClass.contains(SrcReg) &&
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Hexagon::IntRegsRegClass.contains(DestReg)) {
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BuildMI(MBB, I, DL, get(Hexagon::TFR_RsPd), DestReg).
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addReg(SrcReg, getKillRegState(KillSrc));
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return;
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}
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if (Hexagon::IntRegsRegClass.contains(SrcReg) &&
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Hexagon::PredRegsRegClass.contains(DestReg)) {
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BuildMI(MBB, I, DL, get(Hexagon::TFR_PdRs), DestReg).
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addReg(SrcReg, getKillRegState(KillSrc));
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return;
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}
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llvm_unreachable("Unimplemented");
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}
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@ -0,0 +1,8 @@
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; RUN: llc -march=hexagon -mcpu=hexagonv4 -O3 < %s | FileCheck %s
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; CHECK: r{{[0-9]+}} = p{{[0-9]+}}
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define i1 @foo() {
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entry:
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ret i1 false
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}
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