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Make some arrays 'static const' 

llvm-svn: 186311
This commit is contained in:
Craig Topper 2013-07-15 07:22:00 +00:00
parent f18edae094
commit e952ad0bc1
3 changed files with 50 additions and 42 deletions
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18
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
View File

@ -264,16 +264,16 @@ EVT AArch64TargetLowering::getSetCCResultType(LLVMContext &, EVT VT) const {
static void getExclusiveOperation(unsigned Size, AtomicOrdering Ord,
unsigned &LdrOpc,
unsigned &StrOpc) {
static unsigned LoadBares[] = {AArch64::LDXR_byte, AArch64::LDXR_hword,
AArch64::LDXR_word, AArch64::LDXR_dword};
static unsigned LoadAcqs[] = {AArch64::LDAXR_byte, AArch64::LDAXR_hword,
AArch64::LDAXR_word, AArch64::LDAXR_dword};
static unsigned StoreBares[] = {AArch64::STXR_byte, AArch64::STXR_hword,
AArch64::STXR_word, AArch64::STXR_dword};
static unsigned StoreRels[] = {AArch64::STLXR_byte, AArch64::STLXR_hword,
AArch64::STLXR_word, AArch64::STLXR_dword};
static const unsigned LoadBares[] = {AArch64::LDXR_byte, AArch64::LDXR_hword,
AArch64::LDXR_word, AArch64::LDXR_dword};
static const unsigned LoadAcqs[] = {AArch64::LDAXR_byte, AArch64::LDAXR_hword,
AArch64::LDAXR_word, AArch64::LDAXR_dword};
static const unsigned StoreBares[] = {AArch64::STXR_byte, AArch64::STXR_hword,
AArch64::STXR_word, AArch64::STXR_dword};
static const unsigned StoreRels[] = {AArch64::STLXR_byte,AArch64::STLXR_hword,
AArch64::STLXR_word, AArch64::STLXR_dword};
unsigned *LoadOps, *StoreOps;
const unsigned *LoadOps, *StoreOps;
if (Ord == Acquire || Ord == AcquireRelease || Ord == SequentiallyConsistent)
LoadOps = LoadAcqs;
else

26
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
View File

@ -454,7 +454,7 @@ public:
}
bool isMOVN32Imm() const {
static AArch64MCExpr::VariantKind PermittedModifiers[] = {
static const AArch64MCExpr::VariantKind PermittedModifiers[] = {
AArch64MCExpr::VK_AARCH64_SABS_G0,
AArch64MCExpr::VK_AARCH64_SABS_G1,
AArch64MCExpr::VK_AARCH64_DTPREL_G1,
@ -463,13 +463,13 @@ public:
AArch64MCExpr::VK_AARCH64_TPREL_G1,
AArch64MCExpr::VK_AARCH64_TPREL_G0,
};
unsigned NumModifiers = llvm::array_lengthof(PermittedModifiers);
const unsigned NumModifiers = llvm::array_lengthof(PermittedModifiers);
return isMoveWideImm(32, PermittedModifiers, NumModifiers);
}
bool isMOVN64Imm() const {
static AArch64MCExpr::VariantKind PermittedModifiers[] = {
static const AArch64MCExpr::VariantKind PermittedModifiers[] = {
AArch64MCExpr::VK_AARCH64_SABS_G0,
AArch64MCExpr::VK_AARCH64_SABS_G1,
AArch64MCExpr::VK_AARCH64_SABS_G2,
@ -481,14 +481,14 @@ public:
AArch64MCExpr::VK_AARCH64_TPREL_G1,
AArch64MCExpr::VK_AARCH64_TPREL_G0,
};
unsigned NumModifiers = llvm::array_lengthof(PermittedModifiers);
const unsigned NumModifiers = llvm::array_lengthof(PermittedModifiers);
return isMoveWideImm(64, PermittedModifiers, NumModifiers);
}
bool isMOVZ32Imm() const {
static AArch64MCExpr::VariantKind PermittedModifiers[] = {
static const AArch64MCExpr::VariantKind PermittedModifiers[] = {
AArch64MCExpr::VK_AARCH64_ABS_G0,
AArch64MCExpr::VK_AARCH64_ABS_G1,
AArch64MCExpr::VK_AARCH64_SABS_G0,
@ -499,13 +499,13 @@ public:
AArch64MCExpr::VK_AARCH64_TPREL_G1,
AArch64MCExpr::VK_AARCH64_TPREL_G0,
};
unsigned NumModifiers = llvm::array_lengthof(PermittedModifiers);
const unsigned NumModifiers = llvm::array_lengthof(PermittedModifiers);
return isMoveWideImm(32, PermittedModifiers, NumModifiers);
}
bool isMOVZ64Imm() const {
static AArch64MCExpr::VariantKind PermittedModifiers[] = {
static const AArch64MCExpr::VariantKind PermittedModifiers[] = {
AArch64MCExpr::VK_AARCH64_ABS_G0,
AArch64MCExpr::VK_AARCH64_ABS_G1,
AArch64MCExpr::VK_AARCH64_ABS_G2,
@ -521,13 +521,13 @@ public:
AArch64MCExpr::VK_AARCH64_TPREL_G1,
AArch64MCExpr::VK_AARCH64_TPREL_G0,
};
unsigned NumModifiers = llvm::array_lengthof(PermittedModifiers);
const unsigned NumModifiers = llvm::array_lengthof(PermittedModifiers);
return isMoveWideImm(64, PermittedModifiers, NumModifiers);
}
bool isMOVK32Imm() const {
static AArch64MCExpr::VariantKind PermittedModifiers[] = {
static const AArch64MCExpr::VariantKind PermittedModifiers[] = {
AArch64MCExpr::VK_AARCH64_ABS_G0_NC,
AArch64MCExpr::VK_AARCH64_ABS_G1_NC,
AArch64MCExpr::VK_AARCH64_DTPREL_G1_NC,
@ -536,13 +536,13 @@ public:
AArch64MCExpr::VK_AARCH64_TPREL_G1_NC,
AArch64MCExpr::VK_AARCH64_TPREL_G0_NC,
};
unsigned NumModifiers = llvm::array_lengthof(PermittedModifiers);
const unsigned NumModifiers = llvm::array_lengthof(PermittedModifiers);
return isMoveWideImm(32, PermittedModifiers, NumModifiers);
}
bool isMOVK64Imm() const {
static AArch64MCExpr::VariantKind PermittedModifiers[] = {
static const AArch64MCExpr::VariantKind PermittedModifiers[] = {
AArch64MCExpr::VK_AARCH64_ABS_G0_NC,
AArch64MCExpr::VK_AARCH64_ABS_G1_NC,
AArch64MCExpr::VK_AARCH64_ABS_G2_NC,
@ -553,13 +553,13 @@ public:
AArch64MCExpr::VK_AARCH64_TPREL_G1_NC,
AArch64MCExpr::VK_AARCH64_TPREL_G0_NC,
};
unsigned NumModifiers = llvm::array_lengthof(PermittedModifiers);
const unsigned NumModifiers = llvm::array_lengthof(PermittedModifiers);
return isMoveWideImm(64, PermittedModifiers, NumModifiers);
}
bool isMoveWideImm(unsigned RegWidth,
AArch64MCExpr::VariantKind *PermittedModifiers,
const AArch64MCExpr::VariantKind *PermittedModifiers,
unsigned NumModifiers) const {
if (!isImmWithLSL()) return false;

48
llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
View File

@ -152,10 +152,10 @@ getOffsetUImm12OpValue(const MCInst &MI, unsigned OpIdx,
switch (Expr->getKind()) {
default: llvm_unreachable("Unexpected operand modifier");
case AArch64MCExpr::VK_AARCH64_LO12: {
unsigned FixupsBySize[] = { AArch64::fixup_a64_ldst8_lo12,
AArch64::fixup_a64_ldst16_lo12,
AArch64::fixup_a64_ldst32_lo12,
AArch64::fixup_a64_ldst64_lo12,
static const unsigned FixupsBySize[] = { AArch64::fixup_a64_ldst8_lo12,
AArch64::fixup_a64_ldst16_lo12,
AArch64::fixup_a64_ldst32_lo12,
AArch64::fixup_a64_ldst64_lo12,
AArch64::fixup_a64_ldst128_lo12 };
assert(MemSize <= 16 && "Invalid fixup for operation");
FixupKind = FixupsBySize[Log2_32(MemSize)];
@ -166,19 +166,23 @@ getOffsetUImm12OpValue(const MCInst &MI, unsigned OpIdx,
FixupKind = AArch64::fixup_a64_ld64_got_lo12_nc;
break;
case AArch64MCExpr::VK_AARCH64_DTPREL_LO12: {
unsigned FixupsBySize[] = { AArch64::fixup_a64_ldst8_dtprel_lo12,
AArch64::fixup_a64_ldst16_dtprel_lo12,
AArch64::fixup_a64_ldst32_dtprel_lo12,
AArch64::fixup_a64_ldst64_dtprel_lo12 };
static const unsigned FixupsBySize[] = {
AArch64::fixup_a64_ldst8_dtprel_lo12,
AArch64::fixup_a64_ldst16_dtprel_lo12,
AArch64::fixup_a64_ldst32_dtprel_lo12,
AArch64::fixup_a64_ldst64_dtprel_lo12
};
assert(MemSize <= 8 && "Invalid fixup for operation");
FixupKind = FixupsBySize[Log2_32(MemSize)];
break;
}
case AArch64MCExpr::VK_AARCH64_DTPREL_LO12_NC: {
unsigned FixupsBySize[] = { AArch64::fixup_a64_ldst8_dtprel_lo12_nc,
AArch64::fixup_a64_ldst16_dtprel_lo12_nc,
AArch64::fixup_a64_ldst32_dtprel_lo12_nc,
AArch64::fixup_a64_ldst64_dtprel_lo12_nc };
static const unsigned FixupsBySize[] = {
AArch64::fixup_a64_ldst8_dtprel_lo12_nc,
AArch64::fixup_a64_ldst16_dtprel_lo12_nc,
AArch64::fixup_a64_ldst32_dtprel_lo12_nc,
AArch64::fixup_a64_ldst64_dtprel_lo12_nc
};
assert(MemSize <= 8 && "Invalid fixup for operation");
FixupKind = FixupsBySize[Log2_32(MemSize)];
break;
@ -188,19 +192,23 @@ getOffsetUImm12OpValue(const MCInst &MI, unsigned OpIdx,
FixupKind = AArch64::fixup_a64_ld64_gottprel_lo12_nc;
break;
case AArch64MCExpr::VK_AARCH64_TPREL_LO12:{
unsigned FixupsBySize[] = { AArch64::fixup_a64_ldst8_tprel_lo12,
AArch64::fixup_a64_ldst16_tprel_lo12,
AArch64::fixup_a64_ldst32_tprel_lo12,
AArch64::fixup_a64_ldst64_tprel_lo12 };
static const unsigned FixupsBySize[] = {
AArch64::fixup_a64_ldst8_tprel_lo12,
AArch64::fixup_a64_ldst16_tprel_lo12,
AArch64::fixup_a64_ldst32_tprel_lo12,
AArch64::fixup_a64_ldst64_tprel_lo12
};
assert(MemSize <= 8 && "Invalid fixup for operation");
FixupKind = FixupsBySize[Log2_32(MemSize)];
break;
}
case AArch64MCExpr::VK_AARCH64_TPREL_LO12_NC: {
unsigned FixupsBySize[] = { AArch64::fixup_a64_ldst8_tprel_lo12_nc,
AArch64::fixup_a64_ldst16_tprel_lo12_nc,
AArch64::fixup_a64_ldst32_tprel_lo12_nc,
AArch64::fixup_a64_ldst64_tprel_lo12_nc };
static const unsigned FixupsBySize[] = {
AArch64::fixup_a64_ldst8_tprel_lo12_nc,
AArch64::fixup_a64_ldst16_tprel_lo12_nc,
AArch64::fixup_a64_ldst32_tprel_lo12_nc,
AArch64::fixup_a64_ldst64_tprel_lo12_nc
};
assert(MemSize <= 8 && "Invalid fixup for operation");
FixupKind = FixupsBySize[Log2_32(MemSize)];
break;