forked from OSchip/llvm-project
[ARM] Clarify legal addressing modes for ARM and Thumb2. NFC
The existing code is very clever, but not clear, which seems like the wrong tradeoff here. Differential Revision: https://reviews.llvm.org/D36559 llvm-svn: 310653
This commit is contained in:
parent
dbbe5756c1
commit
e9499dd4c7
|
@ -12357,8 +12357,13 @@ bool ARMTargetLowering::isLegalT2ScaledAddressingMode(const AddrMode &AM,
|
||||||
Scale = Scale & ~1;
|
Scale = Scale & ~1;
|
||||||
return Scale == 2 || Scale == 4 || Scale == 8;
|
return Scale == 2 || Scale == 4 || Scale == 8;
|
||||||
case MVT::i64:
|
case MVT::i64:
|
||||||
|
// FIXME: What are we trying to model here? ldrd doesn't have an r + r
|
||||||
|
// version in Thumb mode.
|
||||||
// r + r
|
// r + r
|
||||||
if (((unsigned)AM.HasBaseReg + Scale) <= 2)
|
if (Scale == 1)
|
||||||
|
return true;
|
||||||
|
// r * 2 (this can be lowered to r + r).
|
||||||
|
if (!AM.HasBaseReg && Scale == 2)
|
||||||
return true;
|
return true;
|
||||||
return false;
|
return false;
|
||||||
case MVT::isVoid:
|
case MVT::isVoid:
|
||||||
|
@ -12416,8 +12421,11 @@ bool ARMTargetLowering::isLegalAddressingMode(const DataLayout &DL,
|
||||||
return isPowerOf2_32(Scale & ~1);
|
return isPowerOf2_32(Scale & ~1);
|
||||||
case MVT::i16:
|
case MVT::i16:
|
||||||
case MVT::i64:
|
case MVT::i64:
|
||||||
// r + r
|
// r +/- r
|
||||||
if (((unsigned)AM.HasBaseReg + Scale) <= 2)
|
if (Scale == 1 || (AM.HasBaseReg && Scale == -1))
|
||||||
|
return true;
|
||||||
|
// r * 2 (this can be lowered to r + r).
|
||||||
|
if (!AM.HasBaseReg && Scale == 2)
|
||||||
return true;
|
return true;
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue