forked from OSchip/llvm-project
[LLDB][MIPS] Generalise MIPS arch names
Patch by Nitesh Jain Reviewers: clayborg, jaydeep. Subscribers: zturner, bhushan, mohit.bhakkad, sagar, lldb-commits. Differential Revision: http://reviews.llvm.org/D16840 llvm-svn: 260362
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@ -22,7 +22,7 @@ class CreateDuringStepTestCase(TestBase):
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@expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr24778")
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@expectedFailureAndroid("llvm.org/pr24497", archs=['arm', 'aarch64'])
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@expectedFailureAll(archs=['mips', 'mipsel', 'mips64', 'mips64el']) # IO error due to breakpoint at invalid address
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@expectedFailureAll(triple = re.compile('^mips')) # IO error due to breakpoint at invalid address
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def test_step_inst_with(self):
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"""Test thread creation during step-inst handling."""
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self.build(dictionary=self.getBuildFlags())
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@ -32,7 +32,7 @@ class HelloWatchLocationTestCase(TestBase):
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@expectedFailureAndroid(archs=['arm', 'aarch64']) # Watchpoints not supported
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@expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr24446: WINDOWS XFAIL TRIAGE - Watchpoints not supported on Windows")
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@expectedFailureAll(archs=['mips', 'mipsel', 'mips64', 'mips64el']) # Most of the MIPS boards provide only one H/W watchpoints, and S/W watchpoints are not supported yet
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@expectedFailureAll(triple = re.compile('^mips')) # Most of the MIPS boards provide only one H/W watchpoints, and S/W watchpoints are not supported yet
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@skipIfDarwin
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def test_hello_watchlocation(self):
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"""Test watching a location with '-s size' option."""
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@ -74,7 +74,7 @@ class TestStepOverWatchpoint(TestBase):
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# Most of the MIPS boards provide only one H/W watchpoints, and S/W watchpoints are not supported yet
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arch = self.getArchitecture()
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if arch in ['mips', 'mipsel', 'mips64', 'mips64el']:
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if re.match("^mips",arch):
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self.runCmd("watchpoint delete 1")
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# resolve_location=True, read=False, write=True
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