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XCore: Avoid implicit iterator conversions, NFC 

Avoid implicit conversions from MachineInstrBundleIterator to
MachineInstr*, mainly by preferring MachineInstr& over MachineInstr*.

llvm-svn: 276899
This commit is contained in:
Duncan P. N. Exon Smith 2016-07-27 18:14:38 +00:00
parent 9155354ff2
commit e921088c71
3 changed files with 13 additions and 14 deletions
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15
llvm/lib/Target/XCore/XCoreFrameLowering.cpp
View File

@ -490,8 +490,8 @@ MachineBasicBlock::iterator XCoreFrameLowering::eliminateCallFramePseudoInstr(
if (!hasReservedCallFrame(MF)) {
// Turn the adjcallstackdown instruction into 'extsp <amt>' and the
// adjcallstackup instruction into 'ldaw sp, sp[<amt>]'
MachineInstr *Old = I;
uint64_t Amount = Old->getOperand(0).getImm();
MachineInstr &Old = *I;
uint64_t Amount = Old.getOperand(0).getImm();
if (Amount != 0) {
// We need to keep the stack aligned properly. To do this, we round the
// amount of space needed for the outgoing arguments up to the next
@ -513,15 +513,14 @@ MachineBasicBlock::iterator XCoreFrameLowering::eliminateCallFramePseudoInstr(
}
MachineInstr *New;
if (Old->getOpcode() == XCore::ADJCALLSTACKDOWN) {
if (Old.getOpcode() == XCore::ADJCALLSTACKDOWN) {
int Opcode = isU6 ? XCore::EXTSP_u6 : XCore::EXTSP_lu6;
New=BuildMI(MF, Old->getDebugLoc(), TII.get(Opcode))
.addImm(Amount);
New = BuildMI(MF, Old.getDebugLoc(), TII.get(Opcode)).addImm(Amount);
} else {
assert(Old->getOpcode() == XCore::ADJCALLSTACKUP);
assert(Old.getOpcode() == XCore::ADJCALLSTACKUP);
int Opcode = isU6 ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6;
New=BuildMI(MF, Old->getDebugLoc(), TII.get(Opcode), XCore::SP)
.addImm(Amount);
New = BuildMI(MF, Old.getDebugLoc(), TII.get(Opcode), XCore::SP)
.addImm(Amount);
}
// Replace the pseudo instruction with a new instruction...

6
llvm/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
View File

@ -55,10 +55,10 @@ bool XCoreFTAOElim::runOnMachineFunction(MachineFunction &MF) {
for (MachineBasicBlock::iterator MBBI = MBB.begin(), EE = MBB.end();
MBBI != EE; ++MBBI) {
if (MBBI->getOpcode() == XCore::FRAME_TO_ARGS_OFFSET) {
MachineInstr *OldInst = MBBI;
unsigned Reg = OldInst->getOperand(0).getReg();
MachineInstr &OldInst = *MBBI;
unsigned Reg = OldInst.getOperand(0).getReg();
MBBI = TII.loadImmediate(MBB, MBBI, Reg, StackSize);
OldInst->eraseFromParent();
OldInst.eraseFromParent();
}
}
}

6
llvm/lib/Target/XCore/XCoreInstrInfo.cpp
View File

@ -201,8 +201,8 @@ bool XCoreInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
return false;
// Get the last instruction in the block.
MachineInstr *LastInst = I;
MachineInstr *LastInst = &*I;
// If there is only one terminator instruction, process it.
if (I == MBB.begin() || !isUnpredicatedTerminator(*--I)) {
if (IsBRU(LastInst->getOpcode())) {
@ -224,7 +224,7 @@ bool XCoreInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
}
// Get the instruction before it if it's a terminator.
MachineInstr *SecondLastInst = I;
MachineInstr *SecondLastInst = &*I;
// If there are three terminators, we don't know what sort of block this is.
if (SecondLastInst && I != MBB.begin() && isUnpredicatedTerminator(*--I))