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Replace X86's CanRematLoadWithDispOperand by calling the target-independent 

MachineInstr::isInvariantLoad instead, which has the benefit of being
more complete.

llvm-svn: 83696
This commit is contained in:
Dan Gohman 2009-10-10 00:34:18 +00:00
parent 26e9b89b7c
commit e919de5acf
3 changed files with 8 additions and 28 deletions
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5
llvm/include/llvm/Target/TargetInstrInfo.h
View File

@ -107,7 +107,7 @@ public:
AliasAnalysis *AA = 0) const {
return MI->getOpcode() == IMPLICIT_DEF ||
(MI->getDesc().isRematerializable() &&
(isReallyTriviallyReMaterializable(MI) ||
(isReallyTriviallyReMaterializable(MI, AA) ||
isReallyTriviallyReMaterializableGeneric(MI, AA)));
}
@ -118,7 +118,8 @@ protected:
/// taking into consideration its operands. This predicate must return false
/// if the instruction has any side effects other than producing a value, or
/// if it requres any address registers that are not always available.
virtual bool isReallyTriviallyReMaterializable(const MachineInstr *MI) const {
virtual bool isReallyTriviallyReMaterializable(const MachineInstr *MI,
AliasAnalysis *AA) const {
return false;
}

28
llvm/lib/Target/X86/X86InstrInfo.cpp
View File

@ -782,31 +782,9 @@ static bool regIsPICBase(unsigned BaseReg, const MachineRegisterInfo &MRI) {
return isPICBase;
}
/// CanRematLoadWithDispOperand - Return true if a load with the specified
/// operand is a candidate for remat: for this to be true we need to know that
/// the load will always return the same value, even if moved.
static bool CanRematLoadWithDispOperand(const MachineOperand &MO,
X86TargetMachine &TM) {
// Loads from constant pool entries can be remat'd.
if (MO.isCPI()) return true;
// We can remat globals in some cases.
if (MO.isGlobal()) {
// If this is a load of a stub, not of the global, we can remat it. This
// access will always return the address of the global.
if (isGlobalStubReference(MO.getTargetFlags()))
return true;
// If the global itself is constant, we can remat the load.
if (GlobalVariable *GV = dyn_cast<GlobalVariable>(MO.getGlobal()))
if (GV->isConstant())
return true;
}
return false;
}
bool
X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI) const {
X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI,
AliasAnalysis *AA) const {
switch (MI->getOpcode()) {
default: break;
case X86::MOV8rm:
@ -825,7 +803,7 @@ X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI) const {
if (MI->getOperand(1).isReg() &&
MI->getOperand(2).isImm() &&
MI->getOperand(3).isReg() && MI->getOperand(3).getReg() == 0 &&
CanRematLoadWithDispOperand(MI->getOperand(4), TM)) {
MI->isInvariantLoad(AA)) {
unsigned BaseReg = MI->getOperand(1).getReg();
if (BaseReg == 0 || BaseReg == X86::RIP)
return true;

3
llvm/lib/Target/X86/X86InstrInfo.h
View File

@ -451,7 +451,8 @@ public:
unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
unsigned isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const;
bool isReallyTriviallyReMaterializable(const MachineInstr *MI) const;
bool isReallyTriviallyReMaterializable(const MachineInstr *MI,
AliasAnalysis *AA) const;
void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SubIdx,
const MachineInstr *Orig) const;