forked from OSchip/llvm-project
Fix misoptimization of: xor i1 (icmp eq (X, C1), icmp s[lg]t (X, C2))
llvm-svn: 56834
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@ -3023,7 +3023,7 @@ Instruction *InstCombiner::visitSRem(BinaryOperator &I) {
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I.setOperand(1, RHSNeg);
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return &I;
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}
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// If the sign bits of both operands are zero (i.e. we can prove they are
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// unsigned inputs), turn this into a urem.
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if (I.getType()->isInteger()) {
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@ -4205,7 +4205,8 @@ Instruction *InstCombiner::visitOr(BinaryOperator &I) {
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// Ensure that the larger constant is on the RHS.
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ICmpInst *LHS = cast<ICmpInst>(Op0);
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bool NeedsSwap;
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if (ICmpInst::isSignedPredicate(LHSCC))
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if (ICmpInst::isEquality(LHSCC) ? ICmpInst::isSignedPredicate(RHSCC)
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: ICmpInst::isSignedPredicate(LHSCC))
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NeedsSwap = LHSCst->getValue().sgt(RHSCst->getValue());
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else
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NeedsSwap = LHSCst->getValue().ugt(RHSCst->getValue());
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@ -0,0 +1,10 @@
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; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {or i1}
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; PR2844
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define i32 @test(i32 %p_74) {
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%A = icmp eq i32 %p_74, 0 ; <i1> [#uses=1]
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%B = icmp slt i32 %p_74, -638208501 ; <i1> [#uses=1]
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%or.cond = or i1 %A, %B ; <i1> [#uses=1]
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%iftmp.10.0 = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1]
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ret i32 %iftmp.10.0
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}
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