forked from OSchip/llvm-project
Fixed a few tests and moved a comment to its proper place
llvm-svn: 208665
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@ -5,11 +5,6 @@
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#include <immintrin.h>
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#include <immintrin.h>
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// FIXME: We should lower as many of these as possible to LLVM IR without
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// intrinsics which will allow us to remove redundant intrinsics in the
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// future. Taking care that we manage to optimize them afterwards and emit
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// the actual instruction (or better code).
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__m256i test_mm256_mpsadbw_epu8(__m256i x, __m256i y) {
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__m256i test_mm256_mpsadbw_epu8(__m256i x, __m256i y) {
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// CHECK: @llvm.x86.avx2.mpsadbw({{.*}}, {{.*}}, i32 3)
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// CHECK: @llvm.x86.avx2.mpsadbw({{.*}}, {{.*}}, i32 3)
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return _mm256_mpsadbw_epu8(x, y, 3);
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return _mm256_mpsadbw_epu8(x, y, 3);
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@ -181,8 +176,12 @@ __m256i test_mm256_blendv_epi8(__m256i a, __m256i b, __m256i m) {
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return _mm256_blendv_epi8(a, b, m);
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return _mm256_blendv_epi8(a, b, m);
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}
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}
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// FIXME: We should also lower the __builtin_ia32_pblendw128 (and similar)
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// functions to this IR. In the future we could delete the corresponding
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// intrinsic in LLVM if it's not being used anymore.
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__m256i test_mm256_blend_epi16(__m256i a, __m256i b) {
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__m256i test_mm256_blend_epi16(__m256i a, __m256i b) {
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// CHECK-LABEL: test_mm256_blend_epi16
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// CHECK-LABEL: test_mm256_blend_epi16
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// CHECK-NOT: @llvm.x86.avx2.pblendw
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// CHECK: shufflevector <16 x i16> %{{.*}}, <16 x i16> %{{.*}}, <16 x i32> <i32 0, i32 17, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 25, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
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// CHECK: shufflevector <16 x i16> %{{.*}}, <16 x i16> %{{.*}}, <16 x i32> <i32 0, i32 17, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 25, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
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return _mm256_blend_epi16(a, b, 2);
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return _mm256_blend_epi16(a, b, 2);
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}
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}
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@ -618,11 +617,15 @@ __m256i test_mm256_broadcastsi128_si256(__m128i a) {
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}
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}
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__m128i test_mm_blend_epi32(__m128i a, __m128i b) {
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__m128i test_mm_blend_epi32(__m128i a, __m128i b) {
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// CHECK-LABEL: test_mm_blend_epi32
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// CHECK-NOT: @llvm.x86.avx2.pblendd.128
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// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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return _mm_blend_epi32(a, b, 0x35);
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return _mm_blend_epi32(a, b, 0x35);
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}
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}
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__m256i test_mm256_blend_epi32(__m256i a, __m256i b) {
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__m256i test_mm256_blend_epi32(__m256i a, __m256i b) {
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// CHECK-LABEL: test_mm256_blend_epi32
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// CHECK-NOT: @llvm.x86.avx2.pblendd.256
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// CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 13, i32 6, i32 7>
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// CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 13, i32 6, i32 7>
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return _mm256_blend_epi32(a, b, 0x35);
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return _mm256_blend_epi32(a, b, 0x35);
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}
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}
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