forked from OSchip/llvm-project
AMDGPU: Use aligned vgprs/agprs in gfx90a mir tests
These would fail a verifier check in a future change.
This commit is contained in:
parent
039f79c78c
commit
e844f24a27
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@ -464,8 +464,8 @@ body: |
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name: dmfma4x4_write_vgpr_flat_read_overlap
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name: dmfma4x4_write_vgpr_flat_read_overlap
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body: |
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body: |
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bb.0:
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bb.0:
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$vgpr3_vgpr4 = V_MFMA_F64_4X4X4F64_vgprcd_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $vgpr0_vgpr1, 0, 0, 0, implicit $mode, implicit $exec
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$vgpr4_vgpr5 = V_MFMA_F64_4X4X4F64_vgprcd_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $vgpr0_vgpr1, 0, 0, 0, implicit $mode, implicit $exec
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FLAT_STORE_DWORD $vgpr0_vgpr1, $vgpr4, 0, 0, 0, 0, 0, implicit $mode, implicit $exec, implicit $flat_scr
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FLAT_STORE_DWORD $vgpr0_vgpr1, $vgpr5, 0, 0, 0, 0, 0, implicit $mode, implicit $exec, implicit $flat_scr
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...
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...
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# GCN-LABEL: name: dmfma4x4_write_vgpr_flat_read_full
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# GCN-LABEL: name: dmfma4x4_write_vgpr_flat_read_full
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# GCN: V_MFMA
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# GCN: V_MFMA
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@ -475,8 +475,8 @@ body: |
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name: dmfma4x4_write_vgpr_flat_read_full
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name: dmfma4x4_write_vgpr_flat_read_full
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body: |
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body: |
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bb.0:
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bb.0:
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$vgpr3_vgpr4 = V_MFMA_F64_4X4X4F64_vgprcd_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $vgpr0_vgpr1, 0, 0, 0, implicit $mode, implicit $exec
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$vgpr4_vgpr5 = V_MFMA_F64_4X4X4F64_vgprcd_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $vgpr0_vgpr1, 0, 0, 0, implicit $mode, implicit $exec
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FLAT_STORE_DWORDX2 $vgpr0_vgpr1, $vgpr3_vgpr4, 0, 0, 0, 0, 0, implicit $mode, implicit $exec, implicit $flat_scr
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FLAT_STORE_DWORDX2 $vgpr0_vgpr1, $vgpr4_vgpr5, 0, 0, 0, 0, 0, implicit $mode, implicit $exec, implicit $flat_scr
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...
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...
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# GCN-LABEL: name: dmfma16x16_write_vgpr_flat_read
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# GCN-LABEL: name: dmfma16x16_write_vgpr_flat_read
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# GCN: V_MFMA
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# GCN: V_MFMA
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@ -530,8 +530,8 @@ body: |
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name: dmfma4x4_write_vgpr_valu_read
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name: dmfma4x4_write_vgpr_valu_read
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body: |
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body: |
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bb.0:
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bb.0:
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$vgpr3_vgpr4 = V_MFMA_F64_4X4X4F64_vgprcd_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $vgpr0_vgpr1, 0, 0, 0, implicit $mode, implicit $exec
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$vgpr4_vgpr5 = V_MFMA_F64_4X4X4F64_vgprcd_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $vgpr0_vgpr1, 0, 0, 0, implicit $mode, implicit $exec
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$vgpr5 = V_MOV_B32_e32 $vgpr4, implicit $exec
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$vgpr6 = V_MOV_B32_e32 $vgpr5, implicit $exec
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...
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...
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# GCN-LABEL: name: dmfma16x16_write_vgpr_valu_read
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# GCN-LABEL: name: dmfma16x16_write_vgpr_valu_read
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# GCN: V_MFMA
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# GCN: V_MFMA
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@ -594,8 +594,8 @@ body: |
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name: dmfma4x4_write_vgpr_dot_read
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name: dmfma4x4_write_vgpr_dot_read
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body: |
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body: |
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bb.0:
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bb.0:
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$vgpr3_vgpr4 = V_MFMA_F64_4X4X4F64_vgprcd_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $vgpr0_vgpr1, 0, 0, 0, implicit $mode, implicit $exec
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$vgpr4_vgpr5 = V_MFMA_F64_4X4X4F64_vgprcd_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $vgpr0_vgpr1, 0, 0, 0, implicit $mode, implicit $exec
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$vgpr1 = V_DOT4C_I32_I8_e32 $vgpr0, $vgpr4, $vgpr1, implicit $exec
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$vgpr1 = V_DOT4C_I32_I8_e32 $vgpr0, $vgpr5, $vgpr1, implicit $exec
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...
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...
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# GCN-LABEL: name: dmfma16x16_write_vgpr_dot_read
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# GCN-LABEL: name: dmfma16x16_write_vgpr_dot_read
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# GCN: V_MFMA
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# GCN: V_MFMA
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@ -714,8 +714,8 @@ body: |
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name: dmfma4x4_write_vgpr_valu_write
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name: dmfma4x4_write_vgpr_valu_write
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body: |
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body: |
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bb.0:
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bb.0:
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$vgpr3_vgpr4 = V_MFMA_F64_4X4X4F64_vgprcd_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $vgpr0_vgpr1, 0, 0, 0, implicit $mode, implicit $exec
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$vgpr4_vgpr5 = V_MFMA_F64_4X4X4F64_vgprcd_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $vgpr0_vgpr1, 0, 0, 0, implicit $mode, implicit $exec
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$vgpr3 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
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$vgpr4 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
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...
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...
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# GCN-LABEL: name: dmfma16x16_write_vgpr_valu_write
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# GCN-LABEL: name: dmfma16x16_write_vgpr_valu_write
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# GCN: V_MFMA
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# GCN: V_MFMA
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@ -839,7 +839,7 @@ body: |
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name: dmfma4x4_read_srcc_vgpr_valu_write
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name: dmfma4x4_read_srcc_vgpr_valu_write
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body: |
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body: |
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bb.0:
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bb.0:
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$vgpr3_vgpr4 = V_MFMA_F64_4X4X4F64_vgprcd_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $vgpr0_vgpr1, 0, 0, 0, implicit $mode, implicit $exec
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$vgpr4_vgpr5 = V_MFMA_F64_4X4X4F64_vgprcd_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $vgpr0_vgpr1, 0, 0, 0, implicit $mode, implicit $exec
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$vgpr1 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
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$vgpr1 = V_MOV_B32_e32 0, implicit $mode, implicit $exec
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...
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...
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# GCN-LABEL: name: dmfma16x16_read_srcc_vgpr_valu_write
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# GCN-LABEL: name: dmfma16x16_read_srcc_vgpr_valu_write
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@ -1202,8 +1202,8 @@ body: |
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name: dmfma4x4_write_agpr_flat_read_overlap
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name: dmfma4x4_write_agpr_flat_read_overlap
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body: |
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body: |
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bb.0:
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bb.0:
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$agpr3_agpr4 = V_MFMA_F64_4X4X4F64_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $agpr0_agpr1, 0, 0, 0, implicit $mode, implicit $exec
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$agpr4_agpr5 = V_MFMA_F64_4X4X4F64_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $agpr0_agpr1, 0, 0, 0, implicit $mode, implicit $exec
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FLAT_STORE_DWORD $vgpr0_vgpr1, $agpr4, 0, 0, 0, 0, 0, implicit $mode, implicit $exec, implicit $flat_scr
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FLAT_STORE_DWORD $vgpr0_vgpr1, $agpr5, 0, 0, 0, 0, 0, implicit $mode, implicit $exec, implicit $flat_scr
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...
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...
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# GCN-LABEL: name: dmfma4x4_write_agpr_flat_read_full
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# GCN-LABEL: name: dmfma4x4_write_agpr_flat_read_full
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# GCN: V_MFMA
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# GCN: V_MFMA
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@ -1213,8 +1213,8 @@ body: |
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name: dmfma4x4_write_agpr_flat_read_full
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name: dmfma4x4_write_agpr_flat_read_full
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body: |
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body: |
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bb.0:
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bb.0:
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$agpr3_agpr4 = V_MFMA_F64_4X4X4F64_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $agpr0_agpr1, 0, 0, 0, implicit $mode, implicit $exec
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$agpr4_agpr5 = V_MFMA_F64_4X4X4F64_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $agpr0_agpr1, 0, 0, 0, implicit $mode, implicit $exec
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FLAT_STORE_DWORDX2 $vgpr0_vgpr1, $agpr3_agpr4, 0, 0, 0, 0, 0, implicit $mode, implicit $exec, implicit $flat_scr
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FLAT_STORE_DWORDX2 $vgpr0_vgpr1, $agpr4_agpr5, 0, 0, 0, 0, 0, implicit $mode, implicit $exec, implicit $flat_scr
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...
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...
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# GCN-LABEL: name: dmfma16x16_write_agpr_flat_read
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# GCN-LABEL: name: dmfma16x16_write_agpr_flat_read
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# GCN: V_MFMA
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# GCN: V_MFMA
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@ -1235,8 +1235,8 @@ body: |
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name: dmfma4x4_write_agpr_valu_read
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name: dmfma4x4_write_agpr_valu_read
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body: |
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body: |
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bb.0:
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bb.0:
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$agpr3_agpr4 = V_MFMA_F64_4X4X4F64_e64 $agpr0_agpr1, $vgpr0_vgpr1, $agpr0_agpr1, 0, 0, 0, implicit $mode, implicit $exec
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$agpr4_agpr5 = V_MFMA_F64_4X4X4F64_e64 $agpr0_agpr1, $vgpr0_vgpr1, $agpr0_agpr1, 0, 0, 0, implicit $mode, implicit $exec
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$vgpr5 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec
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$vgpr5 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec
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...
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...
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# GCN-LABEL: name: dmfma16x16_write_agpr_valu_read
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# GCN-LABEL: name: dmfma16x16_write_agpr_valu_read
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# GCN: V_MFMA
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# GCN: V_MFMA
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@ -1256,8 +1256,8 @@ body: |
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name: dmfma4x4_write_agpr_valu_write
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name: dmfma4x4_write_agpr_valu_write
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body: |
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body: |
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bb.0:
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bb.0:
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$agpr3_agpr4 = V_MFMA_F64_4X4X4F64_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $agpr0_agpr1, 0, 0, 0, implicit $mode, implicit $exec
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$agpr4_agpr5 = V_MFMA_F64_4X4X4F64_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $agpr0_agpr1, 0, 0, 0, implicit $mode, implicit $exec
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$agpr3 = V_ACCVGPR_WRITE_B32_e64 0, implicit $mode, implicit $exec
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$agpr4 = V_ACCVGPR_WRITE_B32_e64 0, implicit $mode, implicit $exec
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...
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...
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# GCN-LABEL: name: dmfma16x16_write_agpr_valu_write
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# GCN-LABEL: name: dmfma16x16_write_agpr_valu_write
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# GCN: V_MFMA
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# GCN: V_MFMA
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@ -1276,7 +1276,7 @@ body: |
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name: dmfma4x4_read_srcc_agpr_valu_write
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name: dmfma4x4_read_srcc_agpr_valu_write
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body: |
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body: |
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bb.0:
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bb.0:
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$agpr3_agpr4 = V_MFMA_F64_4X4X4F64_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $agpr0_agpr1, 0, 0, 0, implicit $mode, implicit $exec
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$agpr4_agpr5 = V_MFMA_F64_4X4X4F64_e64 $vgpr0_vgpr1, $vgpr0_vgpr1, $agpr0_agpr1, 0, 0, 0, implicit $mode, implicit $exec
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$agpr1 = V_ACCVGPR_WRITE_B32_e64 0, implicit $mode, implicit $exec
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$agpr1 = V_ACCVGPR_WRITE_B32_e64 0, implicit $mode, implicit $exec
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...
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...
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# GCN-LABEL: name: dmfma16x16_read_srcc_agpr_valu_write
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# GCN-LABEL: name: dmfma16x16_read_srcc_agpr_valu_write
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; GCN: bb.0:
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; GCN: bb.0:
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; GCN: successors: %bb.1(0x80000000)
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; GCN: successors: %bb.1(0x80000000)
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; GCN: S_WAITCNT 0
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; GCN: S_WAITCNT 0
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; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %ir.global4, addrspace 1)
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; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %ir.global4, addrspace 1)
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; GCN: $agpr3_agpr4_agpr5_agpr6 = FLAT_LOAD_DWORDX4 $vgpr7_vgpr8, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 16 from %ir.global16, addrspace 1)
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; GCN: $agpr4_agpr5_agpr6_agpr7 = FLAT_LOAD_DWORDX4 $vgpr8_vgpr9, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 16 from %ir.global16, addrspace 1)
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; GCN: S_WAITCNT 3953
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; GCN: S_WAITCNT 3953
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; GCN: $agpr0 = V_ACCVGPR_MOV_B32 $agpr1, implicit $exec
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; GCN: $agpr0 = V_ACCVGPR_MOV_B32 $agpr1, implicit $exec
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; GCN: S_BRANCH %bb.1
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; GCN: S_BRANCH %bb.1
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; GCN: bb.1:
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; GCN: bb.1:
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; GCN: successors: %bb.2(0x80000000)
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; GCN: successors: %bb.2(0x80000000)
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; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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; GCN: S_WAITCNT 3952
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; GCN: S_WAITCNT 3952
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; GCN: $agpr3_agpr4_agpr5_agpr6 = FLAT_LOAD_DWORDX4 $vgpr7_vgpr8, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 16 from %ir.global16, addrspace 1)
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; GCN: $agpr4_agpr5_agpr6_agpr7 = FLAT_LOAD_DWORDX4 $vgpr8_vgpr9, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 16 from %ir.global16, addrspace 1)
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; GCN: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
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; GCN: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
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; GCN: S_BRANCH %bb.2
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; GCN: S_BRANCH %bb.2
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; GCN: bb.2:
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; GCN: bb.2:
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; GCN: S_WAITCNT 49279
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; GCN: S_WAITCNT 49279
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; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %ir.flat4)
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; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %ir.flat4)
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; GCN: S_WAITCNT 3952
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; GCN: S_WAITCNT 3952
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; GCN: $agpr3_agpr4_agpr5_agpr6 = FLAT_LOAD_DWORDX4 $vgpr7_vgpr8, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 16 from %ir.flat16)
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; GCN: $agpr4_agpr5_agpr6_agpr7 = FLAT_LOAD_DWORDX4 $vgpr8_vgpr9, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 16 from %ir.flat16)
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; GCN: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
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; GCN: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
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; GCN: S_ENDPGM 0
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; GCN: S_ENDPGM 0
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bb.0:
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bb.0:
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successors: %bb.1
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successors: %bb.1
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$agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %ir.global4)
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$agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %ir.global4)
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$agpr3_agpr4_agpr5_agpr6 = FLAT_LOAD_DWORDX4 $vgpr7_vgpr8, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 16 from %ir.global16)
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$agpr4_agpr5_agpr6_agpr7 = FLAT_LOAD_DWORDX4 $vgpr8_vgpr9, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 16 from %ir.global16)
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$agpr0 = V_ACCVGPR_MOV_B32 $agpr1, implicit $exec
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$agpr0 = V_ACCVGPR_MOV_B32 $agpr1, implicit $exec
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S_BRANCH %bb.1
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S_BRANCH %bb.1
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bb.1:
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bb.1:
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successors: %bb.2
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successors: %bb.2
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$agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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$agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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$agpr3_agpr4_agpr5_agpr6 = FLAT_LOAD_DWORDX4 $vgpr7_vgpr8, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 16 from %ir.global16)
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$agpr4_agpr5_agpr6_agpr7 = FLAT_LOAD_DWORDX4 $vgpr8_vgpr9, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 16 from %ir.global16)
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$vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
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$vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
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S_BRANCH %bb.2
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S_BRANCH %bb.2
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bb.2:
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bb.2:
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$agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %ir.flat4)
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$agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %ir.flat4)
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$agpr3_agpr4_agpr5_agpr6 = FLAT_LOAD_DWORDX4 $vgpr7_vgpr8, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 16 from %ir.flat16)
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$agpr4_agpr5_agpr6_agpr7 = FLAT_LOAD_DWORDX4 $vgpr8_vgpr9, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 16 from %ir.flat16)
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$vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
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$vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
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S_ENDPGM 0
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S_ENDPGM 0
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...
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...
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; GCN: bb.0:
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; GCN: bb.0:
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; GCN: successors: %bb.1(0x80000000)
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; GCN: successors: %bb.1(0x80000000)
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; GCN: S_WAITCNT 0
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; GCN: S_WAITCNT 0
|
||||||
; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
; GCN: bb.1:
|
; GCN: bb.1:
|
||||||
; GCN: $vgpr3_vgpr4 = V_LSHLREV_B64_e64 4, $vgpr7_vgpr8, implicit $exec
|
; GCN: $vgpr4_vgpr5 = V_LSHLREV_B64_e64 4, $vgpr8_vgpr9, implicit $exec
|
||||||
; GCN: S_WAITCNT 112
|
; GCN: S_WAITCNT 112
|
||||||
; GCN: FLAT_STORE_DWORD $vgpr3_vgpr4, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
; GCN: FLAT_STORE_DWORD $vgpr4_vgpr5, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
; GCN: S_ENDPGM 0
|
; GCN: S_ENDPGM 0
|
||||||
bb.0:
|
bb.0:
|
||||||
successors: %bb.1
|
successors: %bb.1
|
||||||
$agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
$agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
|
|
||||||
bb.1:
|
bb.1:
|
||||||
$vgpr3_vgpr4 = V_LSHLREV_B64_e64 4, $vgpr7_vgpr8, implicit $exec
|
$vgpr4_vgpr5 = V_LSHLREV_B64_e64 4, $vgpr8_vgpr9, implicit $exec
|
||||||
FLAT_STORE_DWORD $vgpr3_vgpr4, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
FLAT_STORE_DWORD $vgpr4_vgpr5, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
S_ENDPGM 0
|
S_ENDPGM 0
|
||||||
...
|
...
|
||||||
---
|
---
|
||||||
|
@ -139,19 +139,19 @@ body: |
|
||||||
; GCN: bb.0:
|
; GCN: bb.0:
|
||||||
; GCN: successors: %bb.2(0x80000000)
|
; GCN: successors: %bb.2(0x80000000)
|
||||||
; GCN: S_WAITCNT 0
|
; GCN: S_WAITCNT 0
|
||||||
; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
; GCN: S_BRANCH %bb.2
|
; GCN: S_BRANCH %bb.2
|
||||||
; GCN: bb.1:
|
; GCN: bb.1:
|
||||||
; GCN: FLAT_STORE_DWORD $vgpr8_vgpr9, $agpr10, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
; GCN: FLAT_STORE_DWORD $vgpr8_vgpr9, $agpr10, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
; GCN: S_ENDPGM 0
|
; GCN: S_ENDPGM 0
|
||||||
; GCN: bb.2:
|
; GCN: bb.2:
|
||||||
; GCN: $vgpr3_vgpr4 = V_LSHLREV_B64_e64 4, $vgpr7_vgpr8, implicit $exec
|
; GCN: $vgpr4_vgpr5 = V_LSHLREV_B64_e64 4, $vgpr8_vgpr9, implicit $exec
|
||||||
; GCN: S_WAITCNT 112
|
; GCN: S_WAITCNT 112
|
||||||
; GCN: FLAT_STORE_DWORD $vgpr3_vgpr4, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
; GCN: FLAT_STORE_DWORD $vgpr4_vgpr5, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
; GCN: S_ENDPGM 0
|
; GCN: S_ENDPGM 0
|
||||||
bb.0:
|
bb.0:
|
||||||
successors: %bb.2
|
successors: %bb.2
|
||||||
$agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
$agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
S_BRANCH %bb.2
|
S_BRANCH %bb.2
|
||||||
|
|
||||||
bb.1:
|
bb.1:
|
||||||
|
@ -159,8 +159,8 @@ body: |
|
||||||
S_ENDPGM 0
|
S_ENDPGM 0
|
||||||
|
|
||||||
bb.2:
|
bb.2:
|
||||||
$vgpr3_vgpr4 = V_LSHLREV_B64_e64 4, $vgpr7_vgpr8, implicit $exec
|
$vgpr4_vgpr5 = V_LSHLREV_B64_e64 4, $vgpr8_vgpr9, implicit $exec
|
||||||
FLAT_STORE_DWORD $vgpr3_vgpr4, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
FLAT_STORE_DWORD $vgpr4_vgpr5, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
S_ENDPGM 0
|
S_ENDPGM 0
|
||||||
...
|
...
|
||||||
|
|
||||||
|
@ -175,9 +175,9 @@ machineFunctionInfo:
|
||||||
body: |
|
body: |
|
||||||
bb.0:
|
bb.0:
|
||||||
liveins: $vgpr1_vgpr2
|
liveins: $vgpr1_vgpr2
|
||||||
$agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
$agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
S_WAITCNT 0
|
S_WAITCNT 0
|
||||||
FLAT_STORE_DWORD $vgpr1_vgpr2, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
FLAT_STORE_DWORD $vgpr2_vgpr3, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
|
|
||||||
...
|
...
|
||||||
|
|
||||||
|
@ -192,19 +192,19 @@ body: |
|
||||||
liveins: $vgpr1_vgpr2
|
liveins: $vgpr1_vgpr2
|
||||||
; GCN-LABEL: name: bundle_no_waitcnt
|
; GCN-LABEL: name: bundle_no_waitcnt
|
||||||
; GCN: liveins: $vgpr1_vgpr2
|
; GCN: liveins: $vgpr1_vgpr2
|
||||||
; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
; GCN: BUNDLE {
|
; GCN: BUNDLE {
|
||||||
; GCN: S_NOP 0
|
; GCN: S_NOP 0
|
||||||
; GCN: S_NOP 0
|
; GCN: S_NOP 0
|
||||||
; GCN: }
|
; GCN: }
|
||||||
; GCN: S_WAITCNT 112
|
; GCN: S_WAITCNT 112
|
||||||
; GCN: FLAT_STORE_DWORD $vgpr1_vgpr2, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
; GCN: FLAT_STORE_DWORD $vgpr2_vgpr3, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
$agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
$agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
BUNDLE {
|
BUNDLE {
|
||||||
S_NOP 0
|
S_NOP 0
|
||||||
S_NOP 0
|
S_NOP 0
|
||||||
}
|
}
|
||||||
FLAT_STORE_DWORD $vgpr1_vgpr2, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
FLAT_STORE_DWORD $vgpr2_vgpr3, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
|
|
||||||
...
|
...
|
||||||
|
|
||||||
|
@ -220,18 +220,18 @@ body: |
|
||||||
liveins: $vgpr1_vgpr2
|
liveins: $vgpr1_vgpr2
|
||||||
; GCN-LABEL: name: preexisting_waitcnt_in_bundle
|
; GCN-LABEL: name: preexisting_waitcnt_in_bundle
|
||||||
; GCN: liveins: $vgpr1_vgpr2
|
; GCN: liveins: $vgpr1_vgpr2
|
||||||
; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
; GCN: BUNDLE {
|
; GCN: BUNDLE {
|
||||||
; GCN: S_NOP 0
|
; GCN: S_NOP 0
|
||||||
; GCN: S_WAITCNT 0
|
; GCN: S_WAITCNT 0
|
||||||
; GCN: }
|
; GCN: }
|
||||||
; GCN: FLAT_STORE_DWORD $vgpr1_vgpr2, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
; GCN: FLAT_STORE_DWORD $vgpr2_vgpr3, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
$agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
$agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
BUNDLE {
|
BUNDLE {
|
||||||
S_NOP 0
|
S_NOP 0
|
||||||
S_WAITCNT 0
|
S_WAITCNT 0
|
||||||
}
|
}
|
||||||
FLAT_STORE_DWORD $vgpr1_vgpr2, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
FLAT_STORE_DWORD $vgpr2_vgpr3, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
|
|
||||||
...
|
...
|
||||||
|
|
||||||
|
@ -248,14 +248,14 @@ body: |
|
||||||
liveins: $vgpr1_vgpr2
|
liveins: $vgpr1_vgpr2
|
||||||
; GCN-LABEL: name: insert_in_bundle
|
; GCN-LABEL: name: insert_in_bundle
|
||||||
; GCN: liveins: $vgpr1_vgpr2
|
; GCN: liveins: $vgpr1_vgpr2
|
||||||
; GCN: BUNDLE implicit-def $agpr0, implicit $vgpr1_vgpr2 {
|
; GCN: BUNDLE implicit-def $agpr0, implicit $vgpr2_vgpr3 {
|
||||||
; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
; GCN: S_WAITCNT 112
|
; GCN: S_WAITCNT 112
|
||||||
; GCN: FLAT_STORE_DWORD $vgpr1_vgpr2, internal $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
; GCN: FLAT_STORE_DWORD $vgpr2_vgpr3, internal $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
; GCN: }
|
; GCN: }
|
||||||
BUNDLE implicit-def $agpr0, implicit $vgpr1_vgpr2 {
|
BUNDLE implicit-def $agpr0, implicit $vgpr2_vgpr3 {
|
||||||
$agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
$agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
FLAT_STORE_DWORD $vgpr1_vgpr2, internal $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
FLAT_STORE_DWORD $vgpr2_vgpr3, internal $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
}
|
}
|
||||||
...
|
...
|
||||||
|
|
||||||
|
@ -273,16 +273,16 @@ body: |
|
||||||
liveins: $vgpr1_vgpr2
|
liveins: $vgpr1_vgpr2
|
||||||
; GCN-LABEL: name: exit_bundle
|
; GCN-LABEL: name: exit_bundle
|
||||||
; GCN: liveins: $vgpr1_vgpr2
|
; GCN: liveins: $vgpr1_vgpr2
|
||||||
; GCN: BUNDLE implicit-def $agpr0, implicit $vgpr1_vgpr2 {
|
; GCN: BUNDLE implicit-def $agpr0, implicit $vgpr2_vgpr3 {
|
||||||
; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
; GCN: }
|
; GCN: }
|
||||||
; GCN: S_WAITCNT 112
|
; GCN: S_WAITCNT 112
|
||||||
; GCN: FLAT_STORE_DWORD $vgpr1_vgpr2, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
; GCN: FLAT_STORE_DWORD $vgpr2_vgpr3, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
BUNDLE implicit-def $agpr0, implicit $vgpr1_vgpr2 {
|
BUNDLE implicit-def $agpr0, implicit $vgpr2_vgpr3 {
|
||||||
$agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
$agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
}
|
}
|
||||||
|
|
||||||
FLAT_STORE_DWORD $vgpr1_vgpr2, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
FLAT_STORE_DWORD $vgpr2_vgpr3, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
|
|
||||||
...
|
...
|
||||||
|
|
||||||
|
@ -300,17 +300,17 @@ body: |
|
||||||
liveins: $vgpr1_vgpr2
|
liveins: $vgpr1_vgpr2
|
||||||
; GCN-LABEL: name: cross_bundle
|
; GCN-LABEL: name: cross_bundle
|
||||||
; GCN: liveins: $vgpr1_vgpr2
|
; GCN: liveins: $vgpr1_vgpr2
|
||||||
; GCN: BUNDLE implicit-def $agpr0, implicit $vgpr1_vgpr2 {
|
; GCN: BUNDLE implicit-def $agpr0, implicit $vgpr2_vgpr3 {
|
||||||
; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
; GCN: $agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
; GCN: }
|
; GCN: }
|
||||||
; GCN: S_WAITCNT 112
|
; GCN: S_WAITCNT 112
|
||||||
; GCN: BUNDLE implicit $agpr0, implicit $vgpr1_vgpr2 {
|
; GCN: BUNDLE implicit $agpr0, implicit $vgpr2_vgpr3 {
|
||||||
; GCN: FLAT_STORE_DWORD $vgpr1_vgpr2, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
; GCN: FLAT_STORE_DWORD $vgpr2_vgpr3, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
; GCN: }
|
; GCN: }
|
||||||
BUNDLE implicit-def $agpr0, implicit $vgpr1_vgpr2 {
|
BUNDLE implicit-def $agpr0, implicit $vgpr2_vgpr3 {
|
||||||
$agpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
$agpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
}
|
}
|
||||||
BUNDLE implicit $agpr0, implicit $vgpr1_vgpr2 {
|
BUNDLE implicit $agpr0, implicit $vgpr2_vgpr3 {
|
||||||
FLAT_STORE_DWORD $vgpr1_vgpr2, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
FLAT_STORE_DWORD $vgpr2_vgpr3, $agpr0, 0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
||||||
}
|
}
|
||||||
...
|
...
|
||||||
|
|
Loading…
Reference in New Issue