forked from OSchip/llvm-project
[InstCombine] add tests for missing icmp fold (PR32524)
llvm-svn: 299557
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@ -1876,6 +1876,58 @@ define <2 x i1> @icmp_and_X_-16_ne-16_vec(<2 x i32> %X) {
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ret <2 x i1> %cmp
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}
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; X | C == C --> X <=u C (when C+1 is PowerOf2).
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define i1 @or1_eq1(i32 %x) {
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; CHECK-LABEL: @or1_eq1(
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; CHECK-NEXT: [[T0:%.*]] = or i32 %x, 1
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; CHECK-NEXT: [[T1:%.*]] = icmp eq i32 [[T0]], 1
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; CHECK-NEXT: ret i1 [[T1]]
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;
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%t0 = or i32 %x, 1
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%t1 = icmp eq i32 %t0, 1
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ret i1 %t1
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}
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; X | C == C --> X <=u C (when C+1 is PowerOf2).
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define <2 x i1> @or3_eq3_vec(<2 x i8> %x) {
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; CHECK-LABEL: @or3_eq3_vec(
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; CHECK-NEXT: [[T0:%.*]] = or <2 x i8> %x, <i8 3, i8 3>
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; CHECK-NEXT: [[T1:%.*]] = icmp eq <2 x i8> [[T0]], <i8 3, i8 3>
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; CHECK-NEXT: ret <2 x i1> [[T1]]
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;
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%t0 = or <2 x i8> %x, <i8 3, i8 3>
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%t1 = icmp eq <2 x i8> %t0, <i8 3, i8 3>
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ret <2 x i1> %t1
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}
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; X | C != C --> X >u C (when C+1 is PowerOf2).
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define i1 @or7_ne7(i32 %x) {
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; CHECK-LABEL: @or7_ne7(
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; CHECK-NEXT: [[T0:%.*]] = or i32 %x, 7
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; CHECK-NEXT: [[T1:%.*]] = icmp ne i32 [[T0]], 7
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; CHECK-NEXT: ret i1 [[T1]]
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;
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%t0 = or i32 %x, 7
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%t1 = icmp ne i32 %t0, 7
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ret i1 %t1
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}
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; X | C != C --> X >u C (when C+1 is PowerOf2).
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define <2 x i1> @or63_ne63_vec(<2 x i8> %x) {
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; CHECK-LABEL: @or63_ne63_vec(
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; CHECK-NEXT: [[T0:%.*]] = or <2 x i8> %x, <i8 63, i8 63>
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; CHECK-NEXT: [[T1:%.*]] = icmp ne <2 x i8> [[T0]], <i8 63, i8 63>
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; CHECK-NEXT: ret <2 x i1> [[T1]]
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;
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%t0 = or <2 x i8> %x, <i8 63, i8 63>
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%t1 = icmp ne <2 x i8> %t0, <i8 63, i8 63>
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ret <2 x i1> %t1
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}
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define i1 @shrink_constant(i32 %X) {
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; CHECK-LABEL: @shrink_constant(
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; CHECK-NEXT: [[XOR:%.*]] = xor i32 %X, -12
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