forked from OSchip/llvm-project
[M68k][NFC] Fix indentation in M68kInstrArithmetic.td
Merely fix indentation Reviewed By: myhsu Differential Revision: https://reviews.llvm.org/D104434
This commit is contained in:
Jim Lin
parent
05d0f1a8ea
commit
e7bf451056
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@ -90,13 +90,13 @@ let Constraints = "$src = $dst" in {
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// $reg, $ccr <- $reg op $reg
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class MxBiArOp_RFRR_xEA<string MN, SDNode NODE, MxType TYPE, bits<4> CMD, MxBead REG>
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: MxInst<(outs TYPE.ROp:$dst), (ins TYPE.ROp:$src, TYPE.ROp:$opd),
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MN#"."#TYPE.Prefix#"\t$opd, $dst",
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[(set TYPE.VT:$dst, CCR, (NODE TYPE.VT:$src, TYPE.VT:$opd))],
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MxArithEncoding<MxBead4Bits<CMD>,
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!cast<MxEncOpMode>("MxOpMode"#TYPE.Size#TYPE.RLet#"EA"),
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REG,
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!cast<MxEncEA>("MxEncEA"#TYPE.RLet#"_2"),
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MxExtEmpty>>;
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MN#"."#TYPE.Prefix#"\t$opd, $dst",
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[(set TYPE.VT:$dst, CCR, (NODE TYPE.VT:$src, TYPE.VT:$opd))],
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MxArithEncoding<MxBead4Bits<CMD>,
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!cast<MxEncOpMode>("MxOpMode"#TYPE.Size#TYPE.RLet#"EA"),
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REG,
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!cast<MxEncEA>("MxEncEA"#TYPE.RLet#"_2"),
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MxExtEmpty>>;
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/// This Op is similar to the one above except it uses reversed opmode, some
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/// commands(e.g. eor) do not support dEA or rEA modes and require EAd for
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@ -106,42 +106,42 @@ class MxBiArOp_RFRR_xEA<string MN, SDNode NODE, MxType TYPE, bits<4> CMD, MxBead
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/// mess.
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class MxBiArOp_RFRR_EAd<string MN, SDNode NODE, MxType TYPE, bits<4> CMD>
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: MxInst<(outs TYPE.ROp:$dst), (ins TYPE.ROp:$src, TYPE.ROp:$opd),
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MN#"."#TYPE.Prefix#"\t$opd, $dst",
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[(set TYPE.VT:$dst, CCR, (NODE TYPE.VT:$src, TYPE.VT:$opd))],
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MxArithEncoding<MxBead4Bits<CMD>,
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!cast<MxEncOpMode>("MxOpMode"#TYPE.Size#"EAd"),
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MxBeadDReg<2>, MxEncEAd_0, MxExtEmpty>>;
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MN#"."#TYPE.Prefix#"\t$opd, $dst",
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[(set TYPE.VT:$dst, CCR, (NODE TYPE.VT:$src, TYPE.VT:$opd))],
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MxArithEncoding<MxBead4Bits<CMD>,
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!cast<MxEncOpMode>("MxOpMode"#TYPE.Size#"EAd"),
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MxBeadDReg<2>, MxEncEAd_0, MxExtEmpty>>;
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// $reg <- $reg op $imm
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class MxBiArOp_RFRI_xEA<string MN, SDNode NODE, MxType TYPE, bits<4> CMD>
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: MxInst<(outs TYPE.ROp:$dst), (ins TYPE.ROp:$src, TYPE.IOp:$opd),
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MN#"."#TYPE.Prefix#"\t$opd, $dst",
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[(set TYPE.VT:$dst, CCR, (NODE TYPE.VT:$src, TYPE.IPat:$opd))],
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MxArithEncoding<MxBead4Bits<CMD>,
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!cast<MxEncOpMode>("MxOpMode"#TYPE.Size#TYPE.RLet#"EA"),
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MxBeadDReg<0>, MxEncEAi,
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!cast<MxEncExt>("MxExtI"#TYPE.Size#"_2")>>;
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MN#"."#TYPE.Prefix#"\t$opd, $dst",
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[(set TYPE.VT:$dst, CCR, (NODE TYPE.VT:$src, TYPE.IPat:$opd))],
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MxArithEncoding<MxBead4Bits<CMD>,
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!cast<MxEncOpMode>("MxOpMode"#TYPE.Size#TYPE.RLet#"EA"),
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MxBeadDReg<0>, MxEncEAi,
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!cast<MxEncExt>("MxExtI"#TYPE.Size#"_2")>>;
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// Again, there are two ways to write an immediate to Dn register either dEA
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// opmode or using *I encoding, and again some instrucitons also support address
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// registers some do not.
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class MxBiArOp_RFRI<string MN, SDNode NODE, MxType TYPE, bits<4> CMD>
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: MxInst<(outs TYPE.ROp:$dst), (ins TYPE.ROp:$src, TYPE.IOp:$opd),
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MN#"i."#TYPE.Prefix#"\t$opd, $dst",
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[(set TYPE.VT:$dst, CCR, (NODE TYPE.VT:$src, TYPE.IPat:$opd))],
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MxArithImmEncoding<MxBead4Bits<CMD>, !cast<MxEncSize>("MxEncSize"#TYPE.Size),
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!cast<MxEncEA>("MxEncEA"#TYPE.RLet#"_0"), MxExtEmpty,
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!cast<MxEncExt>("MxExtI"#TYPE.Size#"_2")>>;
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MN#"i."#TYPE.Prefix#"\t$opd, $dst",
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[(set TYPE.VT:$dst, CCR, (NODE TYPE.VT:$src, TYPE.IPat:$opd))],
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MxArithImmEncoding<MxBead4Bits<CMD>, !cast<MxEncSize>("MxEncSize"#TYPE.Size),
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!cast<MxEncEA>("MxEncEA"#TYPE.RLet#"_0"), MxExtEmpty,
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!cast<MxEncExt>("MxExtI"#TYPE.Size#"_2")>>;
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let mayLoad = 1 in
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class MxBiArOp_RFRM<string MN, SDNode NODE, MxType TYPE, MxOperand OPD, ComplexPattern PAT,
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bits<4> CMD, MxEncEA EA, MxEncExt EXT>
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: MxInst<(outs TYPE.ROp:$dst), (ins TYPE.ROp:$src, OPD:$opd),
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MN#"."#TYPE.Prefix#"\t$opd, $dst",
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[(set TYPE.VT:$dst, CCR, (NODE TYPE.VT:$src, (TYPE.Load PAT:$opd)))],
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MxArithEncoding<MxBead4Bits<CMD>,
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!cast<MxEncOpMode>("MxOpMode"#TYPE.Size#TYPE.RLet#"EA"),
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MxBeadDReg<0>, EA, EXT>>;
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MN#"."#TYPE.Prefix#"\t$opd, $dst",
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[(set TYPE.VT:$dst, CCR, (NODE TYPE.VT:$src, (TYPE.Load PAT:$opd)))],
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MxArithEncoding<MxBead4Bits<CMD>,
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!cast<MxEncOpMode>("MxOpMode"#TYPE.Size#TYPE.RLet#"EA"),
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MxBeadDReg<0>, EA, EXT>>;
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} // Constraints
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@ -153,22 +153,22 @@ class MxBiArOp_FMR<string MN, SDNode NODE, MxType TYPE,
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MxOperand MEMOpd, ComplexPattern MEMPat,
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bits<4> CMD, MxEncEA EA, MxEncExt EXT>
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: MxInst<(outs), (ins MEMOpd:$dst, TYPE.ROp:$opd),
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MN#"."#TYPE.Prefix#"\t$opd, $dst",
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[],
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MxArithEncoding<MxBead4Bits<CMD>,
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!cast<MxEncOpMode>("MxOpMode"#TYPE.Size#"EA"#TYPE.RLet),
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MxBeadDReg<1>, EA, EXT>>;
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MN#"."#TYPE.Prefix#"\t$opd, $dst",
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[],
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MxArithEncoding<MxBead4Bits<CMD>,
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!cast<MxEncOpMode>("MxOpMode"#TYPE.Size#"EA"#TYPE.RLet),
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MxBeadDReg<1>, EA, EXT>>;
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class MxBiArOp_FMI<string MN, SDNode NODE, MxType TYPE,
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MxOperand MEMOpd, ComplexPattern MEMPat,
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bits<4> CMD, MxEncEA MEMEA, MxEncExt MEMExt>
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: MxInst<(outs), (ins MEMOpd:$dst, TYPE.IOp:$opd),
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MN#"."#TYPE.Prefix#"\t$opd, $dst",
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[],
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MxArithImmEncoding<MxBead4Bits<CMD>,
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!cast<MxEncSize>("MxEncSize"#TYPE.Size),
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MEMEA, MEMExt,
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!cast<MxEncExt>("MxExtI"#TYPE.Size#"_1")>>;
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MN#"."#TYPE.Prefix#"\t$opd, $dst",
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[],
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MxArithImmEncoding<MxBead4Bits<CMD>,
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!cast<MxEncSize>("MxEncSize"#TYPE.Size),
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MEMEA, MEMExt,
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!cast<MxEncExt>("MxExtI"#TYPE.Size#"_1")>>;
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} // mayLoad, mayStore
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} // Defs = [CCR]
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@ -481,8 +481,8 @@ let Defs = [CCR] in
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let Constraints = "$src = $dst" in
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class MxExt<MxType TO, MxType FROM>
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: MxInst<(outs TO.ROp:$dst), (ins TO.ROp:$src),
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"ext."#TO.Prefix#"\t$src", [],
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MxExtEncoding<!cast<MxBead3Bits>("MxExtOpmode_"#TO.Prefix#FROM.Prefix)>>;
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"ext."#TO.Prefix#"\t$src", [],
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MxExtEncoding<!cast<MxBead3Bits>("MxExtOpmode_"#TO.Prefix#FROM.Prefix)>>;
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def EXT16 : MxExt<MxType16d, MxType8d>;
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def EXT32 : MxExt<MxType32d, MxType16d>;
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@ -781,13 +781,13 @@ foreach N = ["add", "addc"] in {
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// add imm, (An)
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def : Pat<(store (!cast<SDNode>(N) (load MxType8.JPat:$dst), MxType8.IPat:$opd),
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MxType8.JPat:$dst),
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MxType8.JPat:$dst),
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(ADD8ji MxType8.JOp:$dst, imm:$opd)>;
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def : Pat<(store (!cast<SDNode>(N) (load MxType16.JPat:$dst), MxType16.IPat:$opd),
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MxType16.JPat:$dst),
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MxType16.JPat:$dst),
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(ADD16ji MxType16.JOp:$dst, imm:$opd)>;
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def : Pat<(store (!cast<SDNode>(N) (load MxType32.JPat:$dst), MxType32.IPat:$opd),
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MxType32.JPat:$dst),
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MxType32.JPat:$dst),
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(ADD32ji MxType32.JOp:$dst, imm:$opd)>;
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} // foreach add, addc
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