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[DAGCombiner] Rewrite r331896 in a different way to address a FIXME. NFCI 

llvm-svn: 342809
This commit is contained in:
Craig Topper 2018-09-22 18:03:14 +00:00
parent c65d39a464
commit e79a588cac
1 changed files with 14 additions and 11 deletions
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25
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -9852,17 +9852,20 @@ SDValue DAGCombiner::visitBITCAST(SDNode *N) {
}
// If the input is a constant, let getNode fold it.
// We always need to check that this is just a fp -> int or int -> conversion
// otherwise we will get back N which will confuse the caller into thinking
// we used CombineTo. This can block target combines from running. If we can't
// allowed legal operations, we need to ensure the resulting operation will be
// legal.
// TODO: Maybe we should check that the return value isn't N explicitly?
if ((isa<ConstantSDNode>(N0) && VT.isFloatingPoint() && !VT.isVector() &&
(!LegalOperations || TLI.isOperationLegal(ISD::ConstantFP, VT))) ||
(isa<ConstantFPSDNode>(N0) && VT.isInteger() && !VT.isVector() &&
(!LegalOperations || TLI.isOperationLegal(ISD::Constant, VT))))
return DAG.getBitcast(VT, N0);
if (isa<ConstantSDNode>(N0) || isa<ConstantFPSDNode>(N0)) {
// If we can't allow illegal operations, we need to check that this is just
// a fp -> int or int -> conversion and that the resulting operation will
// be legal.
if (!LegalOperations ||
(isa<ConstantSDNode>(N0) && VT.isFloatingPoint() && !VT.isVector() &&
TLI.isOperationLegal(ISD::ConstantFP, VT)) ||
(isa<ConstantFPSDNode>(N0) && VT.isInteger() && !VT.isVector() &&
TLI.isOperationLegal(ISD::Constant, VT))) {
SDValue C = DAG.getBitcast(VT, N0);
if (C.getNode() != N)
return C;
}
}
// (conv (conv x, t1), t2) -> (conv x, t2)
if (N0.getOpcode() == ISD::BITCAST)