forked from OSchip/llvm-project
[TargetLowering] expandUnalignedStore - cleanup EVT variables. NFCI.
Avoid duplicated EVTs and rename Store/Load VTs to avoid -Wshadow warnings. llvm-svn: 359877
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@ -5325,17 +5325,16 @@ SDValue TargetLowering::expandUnalignedStore(StoreSDNode *ST,
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EVT VT = Val.getValueType();
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int Alignment = ST->getAlignment();
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auto &MF = DAG.getMachineFunction();
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EVT MemVT = ST->getMemoryVT();
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EVT StoreMemVT = ST->getMemoryVT();
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SDLoc dl(ST);
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if (MemVT.isFloatingPoint() || MemVT.isVector()) {
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if (StoreMemVT.isFloatingPoint() || StoreMemVT.isVector()) {
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EVT intVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
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if (isTypeLegal(intVT)) {
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if (!isOperationLegalOrCustom(ISD::STORE, intVT) &&
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MemVT.isVector()) {
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StoreMemVT.isVector()) {
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// Scalarize the store and let the individual components be handled.
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SDValue Result = scalarizeVectorStore(ST, DAG);
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return Result;
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}
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// Expand to a bitconvert of the value to the integer type of the
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@ -5348,24 +5347,22 @@ SDValue TargetLowering::expandUnalignedStore(StoreSDNode *ST,
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}
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// Do a (aligned) store to a stack slot, then copy from the stack slot
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// to the final destination using (unaligned) integer loads and stores.
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EVT StoredVT = ST->getMemoryVT();
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MVT RegVT =
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getRegisterType(*DAG.getContext(),
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EVT::getIntegerVT(*DAG.getContext(),
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StoredVT.getSizeInBits()));
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MVT RegVT = getRegisterType(
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*DAG.getContext(),
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EVT::getIntegerVT(*DAG.getContext(), StoreMemVT.getSizeInBits()));
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EVT PtrVT = Ptr.getValueType();
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unsigned StoredBytes = StoredVT.getStoreSize();
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unsigned StoredBytes = StoreMemVT.getStoreSize();
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unsigned RegBytes = RegVT.getSizeInBits() / 8;
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unsigned NumRegs = (StoredBytes + RegBytes - 1) / RegBytes;
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// Make sure the stack slot is also aligned for the register type.
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SDValue StackPtr = DAG.CreateStackTemporary(StoredVT, RegVT);
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SDValue StackPtr = DAG.CreateStackTemporary(StoreMemVT, RegVT);
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auto FrameIndex = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
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// Perform the original store, only redirected to the stack slot.
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SDValue Store = DAG.getTruncStore(
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Chain, dl, Val, StackPtr,
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MachinePointerInfo::getFixedStack(MF, FrameIndex, 0), StoredVT);
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MachinePointerInfo::getFixedStack(MF, FrameIndex, 0), StoreMemVT);
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EVT StackPtrVT = StackPtr.getValueType();
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@ -5394,17 +5391,17 @@ SDValue TargetLowering::expandUnalignedStore(StoreSDNode *ST,
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// The last store may be partial. Do a truncating store. On big-endian
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// machines this requires an extending load from the stack slot to ensure
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// that the bits are in the right place.
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EVT MemVT = EVT::getIntegerVT(*DAG.getContext(),
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8 * (StoredBytes - Offset));
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EVT LoadMemVT =
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EVT::getIntegerVT(*DAG.getContext(), 8 * (StoredBytes - Offset));
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// Load from the stack slot.
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SDValue Load = DAG.getExtLoad(
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ISD::EXTLOAD, dl, RegVT, Store, StackPtr,
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MachinePointerInfo::getFixedStack(MF, FrameIndex, Offset), MemVT);
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MachinePointerInfo::getFixedStack(MF, FrameIndex, Offset), LoadMemVT);
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Stores.push_back(
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DAG.getTruncStore(Load.getValue(1), dl, Load, Ptr,
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ST->getPointerInfo().getWithOffset(Offset), MemVT,
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ST->getPointerInfo().getWithOffset(Offset), LoadMemVT,
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MinAlign(ST->getAlignment(), Offset),
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ST->getMemOperand()->getFlags(), ST->getAAInfo()));
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// The order of the stores doesn't matter - say it with a TokenFactor.
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@ -5412,18 +5409,16 @@ SDValue TargetLowering::expandUnalignedStore(StoreSDNode *ST,
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return Result;
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}
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assert(ST->getMemoryVT().isInteger() &&
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!ST->getMemoryVT().isVector() &&
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assert(StoreMemVT.isInteger() && !StoreMemVT.isVector() &&
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"Unaligned store of unknown type.");
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// Get the half-size VT
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EVT NewStoredVT = ST->getMemoryVT().getHalfSizedIntegerVT(*DAG.getContext());
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EVT NewStoredVT = StoreMemVT.getHalfSizedIntegerVT(*DAG.getContext());
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int NumBits = NewStoredVT.getSizeInBits();
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int IncrementSize = NumBits / 8;
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// Divide the stored value in two parts.
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SDValue ShiftAmount =
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DAG.getConstant(NumBits, dl, getShiftAmountTy(Val.getValueType(),
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DAG.getDataLayout()));
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SDValue ShiftAmount = DAG.getConstant(
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NumBits, dl, getShiftAmountTy(Val.getValueType(), DAG.getDataLayout()));
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SDValue Lo = Val;
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SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount);
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@ -5442,7 +5437,7 @@ SDValue TargetLowering::expandUnalignedStore(StoreSDNode *ST,
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ST->getMemOperand()->getFlags(), ST->getAAInfo());
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SDValue Result =
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DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Store1, Store2);
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DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Store1, Store2);
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return Result;
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}
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