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// $Id$ -*-c++-*-
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//***************************************************************************
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// File:
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// MachineCacheInfo.h
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//
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// Purpose:
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// Describes properties of the target cache architecture.
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//**************************************************************************/
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#ifndef LLVM_TARGET_MACHINECACHEINFO_H
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#define LLVM_TARGET_MACHINECACHEINFO_H
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/DataTypes.h"
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#include <vector>
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//---------------------------------------------------------------------------
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// class MachineCacheInfo
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//
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// Purpose:
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// Describes properties of the target cache architecture.
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//---------------------------------------------------------------------------
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class MachineCacheInfo : public NonCopyableV {
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public:
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const TargetMachine& target;
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protected:
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unsigned int numLevels;
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vector<unsigned short> cacheLineSizes;
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vector<unsigned int> cacheSizes;
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vector<unsigned short> cacheAssoc;
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public:
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/*ctor*/ MachineCacheInfo (const TargetMachine& tgt);
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/*dtor*/ virtual ~MachineCacheInfo () {}
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// Default parameters are:
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// NumLevels = 2
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// L1: LineSize 16, Cache Size 32KB, Direct-mapped (assoc = 1)
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// L2: LineSize 32, Cache Size 1 MB, 4-way associative
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// NOTE: Cache levels are numbered from 1 as above, not from 0.
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//
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virtual void Initialize (); // subclass to override defaults
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unsigned int getNumCacheLevels () const {
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return numLevels;
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}
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unsigned short getCacheLineSize (unsigned level) const {
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assert(level <= cacheLineSizes.size() && "Invalid cache level");
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return cacheLineSizes[level-1];
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}
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unsigned int getCacheSize (unsigned level) const {
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assert(level <= cacheSizes.size() && "Invalid cache level");
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return cacheSizes[level-1];
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}
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unsigned short getCacheAssoc (unsigned level) const {
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assert(level <= cacheAssoc.size() && "Invalid cache level");
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return cacheAssoc[level];
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}
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};
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//---------------------------------------------------------------------------
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#endif
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