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[DAGCombiner] Use getShiftAmountConstant in DAGCombiner::foldSelectOfConstants. 

This enables fshl to be matched earlier on X86

  %6 = lshr i32 %3, 1
  %7 = select i1 %4, i32 -2147483648, i32 0
  %8 = or i32 %6, %7

X86 uses i8 for shift amounts. SelectionDAGBuilder creates the
ISD::SRL with an i8 shift type. DAGCombiner turns the select into
an ISD::SHL. Prior to this patch it would use i32 for the shift
amount. fshl matching failed because the shift amounts have different
types. LegalizeDAG fixes the ISD::SHL shift amount to i8. This
allowed fshl matching to succeed.

With this patch, the ISD::SHL will be created with an i8 shift
amount. This allows the fshl to match immediately.

No test case beause we still end up with a fshl either way.
This commit is contained in:
Craig Topper 2022-02-13 18:56:18 -08:00
parent b2f5164deb
commit e72fe654b7
1 changed files with 2 additions and 1 deletions
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3
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -9765,7 +9765,8 @@ SDValue DAGCombiner::foldSelectOfConstants(SDNode *N) {
if (C1Val.isPowerOf2() && C2Val.isZero()) {
if (VT != MVT::i1)
Cond = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, Cond);
SDValue ShAmtC = DAG.getConstant(C1Val.exactLogBase2(), DL, VT);
SDValue ShAmtC =
DAG.getShiftAmountConstant(C1Val.exactLogBase2(), VT, DL);
return DAG.getNode(ISD::SHL, DL, VT, Cond, ShAmtC);
}