forked from OSchip/llvm-project
[ELF][AArch64] Implement the AArch64 TLSLD_LDST_LO12 family of relocs
Implement the following relocations for AArch64: R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC These are specified in ELF for the 64-bit Arm Architecture. Fixes pr36727 Differential Revision: https://reviews.llvm.org/D46255 llvm-svn: 331511
This commit is contained in:
Peter Smith
parent
27a841fe83
commit
e72d3d32bb
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@ -89,6 +89,11 @@ RelExpr AArch64::getRelExpr(RelType Type, const Symbol &S,
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return R_TLSDESC_CALL;
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case R_AARCH64_TLSLE_ADD_TPREL_HI12:
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case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
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case R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
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case R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
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case R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
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case R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
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case R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC:
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return R_TLS;
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case R_AARCH64_CALL26:
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case R_AARCH64_CONDBR19:
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@ -290,24 +295,29 @@ void AArch64::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
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or32le(Loc, (Val & 0x1FFFFC) << 3);
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break;
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case R_AARCH64_LDST8_ABS_LO12_NC:
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case R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
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or32AArch64Imm(Loc, getBits(Val, 0, 11));
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break;
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case R_AARCH64_LDST16_ABS_LO12_NC:
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case R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
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checkAlignment(Loc, Val, 2, Type);
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or32AArch64Imm(Loc, getBits(Val, 1, 11));
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break;
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case R_AARCH64_LDST32_ABS_LO12_NC:
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case R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
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checkAlignment(Loc, Val, 4, Type);
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or32AArch64Imm(Loc, getBits(Val, 2, 11));
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break;
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case R_AARCH64_LDST64_ABS_LO12_NC:
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case R_AARCH64_LD64_GOT_LO12_NC:
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case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
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case R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
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case R_AARCH64_TLSDESC_LD64_LO12:
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checkAlignment(Loc, Val, 8, Type);
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or32AArch64Imm(Loc, getBits(Val, 3, 11));
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break;
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case R_AARCH64_LDST128_ABS_LO12_NC:
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case R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC:
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checkAlignment(Loc, Val, 16, Type);
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or32AArch64Imm(Loc, getBits(Val, 4, 11));
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break;
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@ -0,0 +1,83 @@
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// RUN: llvm-mc -triple=aarch64-linux-gnu -filetype=obj %s -o %t.o
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// RUN: ld.lld %t.o -o %t
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// RUN: llvm-objdump -d %t | FileCheck %s
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// RUN: llvm-readelf --symbols %t | FileCheck -check-prefix CHECK-SYMS %s
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.text
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.globl _start
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.type _start, %function
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_start: mrs x8, TPIDR_EL0
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add x8, x8, :tprel_hi12:var0
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ldr q20, [x8, :tprel_lo12_nc:var0]
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add x8, x8, :tprel_hi12:var1
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ldr x0, [x8, :tprel_lo12_nc:var1]
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add x8, x8, :tprel_hi12:var2
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ldr w0, [x8, :tprel_lo12_nc:var2]
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add x8, x8, :tprel_hi12:var3
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ldrh w0, [x8, :tprel_lo12_nc:var3]
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add x8, x8, :tprel_hi12:var4
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ldrb w0, [x8, :tprel_lo12_nc:var4]
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// CHECK: _start:
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// CHECK-NEXT: 20000: 48 d0 3b d5 mrs x8, TPIDR_EL0
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// 0x0 + c10 = 0xc10 = tcb (16-bytes) + var0
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// CHECK-NEXT: 20004: 08 01 40 91 add x8, x8, #0, lsl #12
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// CHECK-NEXT: 20008: 14 05 c3 3d ldr q20, [x8, #3088]
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// 0x1000 + 0x820 = 0x1820 = tcb + var1
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// CHECK-NEXT: 2000c: 08 05 40 91 add x8, x8, #1, lsl #12
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// CHECK-NEXT: 20010: 00 11 44 f9 ldr x0, [x8, #2080]
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// 0x2000 + 0x428 = 0x2428 = tcb + var2
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// CHECK-NEXT: 20014: 08 09 40 91 add x8, x8, #2, lsl #12
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// CHECK-NEXT: 20018: 00 29 44 b9 ldr w0, [x8, #1064]
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// 0x3000 + 0x2c = 0x302c = tcb + var3
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// CHECK-NEXT: 2001c: 08 0d 40 91 add x8, x8, #3, lsl #12
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// CHECK-NEXT: 20020: 00 59 40 79 ldrh w0, [x8, #44]
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// 0x3000 + 0xc2e = 0x32ce = tcb + var4
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// CHECK-NEXT: 20024: 08 0d 40 91 add x8, x8, #3, lsl #12
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// CHECK-NEXT: 20028: 00 b9 70 39 ldrb w0, [x8, #3118]
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// CHECK-SYMS: 0000000000000c00 0 TLS GLOBAL DEFAULT 2 var0
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// CHECK-SYMS-NEXT: 0000000000001810 4 TLS GLOBAL DEFAULT 2 var1
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// CHECK-SYMS-NEXT: 0000000000002418 2 TLS GLOBAL DEFAULT 2 var2
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// CHECK-SYMS-NEXT: 000000000000301c 1 TLS GLOBAL DEFAULT 2 var3
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// CHECK-SYMS-NEXT: 0000000000003c1e 0 TLS GLOBAL DEFAULT 2 var4
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.globl var0
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.globl var1
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.globl var2
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.globl var3
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.globl var4
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.type var0,@object
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.type var1,@object
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.type var2,@object
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.type var3,@object
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.section .tbss,"awT",@nobits
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.balign 16
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.space 1024 * 3
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var0:
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.quad 0
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.quad 0
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.size var1, 16
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.space 1024 * 3
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var1:
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.quad 0
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.size var1, 8
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.space 1024 * 3
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var2:
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.word 0
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.size var1, 4
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.space 1024 * 3
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var3:
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.hword 0
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.size var2, 2
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.space 1024 * 3
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var4:
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.byte 0
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.size var3, 1
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.space 1024 * 3
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