forked from OSchip/llvm-project
Next round of pattern isel changes, mostly dealing with calls.
llvm-svn: 20841
This commit is contained in:
Nate Begeman
parent
5d7610de65
commit
e70b5c79f8
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@ -58,8 +58,8 @@ namespace {
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/// LowerCallTo - This hook lowers an abstract call to a function into an
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/// actual call.
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virtual std::pair<SDOperand, SDOperand>
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LowerCallTo(SDOperand Chain, const Type *RetTy, SDOperand Callee,
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ArgListTy &Args, SelectionDAG &DAG);
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LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg,
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SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG);
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virtual std::pair<SDOperand, SDOperand>
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LowerVAStart(SDOperand Chain, SelectionDAG &DAG);
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@ -206,35 +206,136 @@ PPC32TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
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std::pair<SDOperand, SDOperand>
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PPC32TargetLowering::LowerCallTo(SDOperand Chain,
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const Type *RetTy, SDOperand Callee,
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ArgListTy &Args, SelectionDAG &DAG) {
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// FIXME
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int NumBytes = 56;
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Chain = DAG.getNode(ISD::ADJCALLSTACKDOWN, MVT::Other, Chain,
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DAG.getConstant(NumBytes, getPointerTy()));
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const Type *RetTy, bool isVarArg,
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SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG) {
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// args_to_use will accumulate outgoing args for the ISD::CALL case in
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// SelectExpr to use to put the arguments in the appropriate registers.
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std::vector<SDOperand> args_to_use;
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for (unsigned i = 0, e = Args.size(); i != e; ++i)
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{
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switch (getValueType(Args[i].second)) {
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default: assert(0 && "Unexpected ValueType for argument!");
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case MVT::i1:
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case MVT::i8:
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case MVT::i16:
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// Promote the integer to 32 bits. If the input type is signed use a
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// sign extend, otherwise use a zero extend.
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if (Args[i].second->isSigned())
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Args[i].first = DAG.getNode(ISD::SIGN_EXTEND, MVT::i32, Args[i].first);
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else
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Args[i].first = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Args[i].first);
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break;
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case MVT::i32:
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case MVT::i64:
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case MVT::f32:
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case MVT::f64:
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break;
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// Count how many bytes are to be pushed on the stack, including the linkage
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// area, and parameter passing area.
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unsigned NumBytes = 24;
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if (Args.empty()) {
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NumBytes = 0; // Save zero bytes.
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} else {
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for (unsigned i = 0, e = Args.size(); i != e; ++i)
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switch (getValueType(Args[i].second)) {
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default: assert(0 && "Unknown value type!");
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case MVT::i1:
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case MVT::i8:
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case MVT::i16:
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case MVT::i32:
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case MVT::f32:
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NumBytes += 4;
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break;
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case MVT::i64:
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case MVT::f64:
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NumBytes += 8;
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break;
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}
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// Just to be safe, we'll always reserve the full 24 bytes of linkage area
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// plus 32 bytes of argument space in case any called code gets funky on us.
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if (NumBytes < 56) NumBytes = 56;
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// Adjust the stack pointer for the new arguments...
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// These operations are automatically eliminated by the prolog/epilog pass
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Chain = DAG.getNode(ISD::ADJCALLSTACKDOWN, MVT::Other, Chain,
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DAG.getConstant(NumBytes, getPointerTy()));
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// Set up a copy of the stack pointer for use loading and storing any
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// arguments that may not fit in the registers available for argument
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// passing.
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SDOperand StackPtr = DAG.getCopyFromReg(PPC::R1, MVT::i32,
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DAG.getEntryNode());
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// Figure out which arguments are going to go in registers, and which in
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// memory. Also, if this is a vararg function, floating point operations
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// must be stored to our stack, and loaded into integer regs as well, if
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// any integer regs are available for argument passing.
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unsigned ArgOffset = 24;
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unsigned GPR_remaining = 8;
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unsigned FPR_remaining = 13;
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std::vector<SDOperand> Stores;
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for (unsigned i = 0, e = Args.size(); i != e; ++i) {
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// PtrOff will be used to store the current argument to the stack if a
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// register cannot be found for it.
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SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
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PtrOff = DAG.getNode(ISD::ADD, MVT::i32, StackPtr, PtrOff);
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switch (getValueType(Args[i].second)) {
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default: assert(0 && "Unexpected ValueType for argument!");
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case MVT::i1:
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case MVT::i8:
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case MVT::i16:
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// Promote the integer to 32 bits. If the input type is signed use a
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// sign extend, otherwise use a zero extend.
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if (Args[i].second->isSigned())
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Args[i].first =DAG.getNode(ISD::SIGN_EXTEND, MVT::i32, Args[i].first);
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else
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Args[i].first =DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Args[i].first);
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// FALL THROUGH
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case MVT::i32:
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if (GPR_remaining > 0) {
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args_to_use.push_back(Args[i].first);
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--GPR_remaining;
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} else {
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Stores.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
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Args[i].first, PtrOff));
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}
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ArgOffset += 4;
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break;
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case MVT::i64:
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// If we have 2 or more GPRs, we won't do anything and let the ISD::CALL
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// functionality in SelectExpr move pieces for us.
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if (GPR_remaining > 1) {
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args_to_use.push_back(Args[i].first);
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GPR_remaining -= 2;
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} else if (GPR_remaining > 0) {
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args_to_use.push_back(Args[i].first);
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SDOperand LowPart =
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DAG.getNode(ISD::TRUNCATE, MVT::i32, Args[i].first);
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SDOperand ConstFour = DAG.getConstant(4, getPointerTy());
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PtrOff = DAG.getNode(ISD::ADD, MVT::i32, PtrOff, ConstFour);
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Stores.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
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LowPart, PtrOff));
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--GPR_remaining;
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} else {
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Stores.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
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Args[i].first, PtrOff));
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}
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ArgOffset += 8;
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break;
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case MVT::f32:
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if (FPR_remaining > 0 && GPR_remaining > 0 && isVarArg) {
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--FPR_remaining;
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ArgOffset += 4;
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} else if (FPR_remaining > 0) {
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--FPR_remaining;
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if (GPR_remaining > 0) --GPR_remaining;
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} else {
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Stores.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
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Args[i].first, PtrOff));
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}
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ArgOffset += 4;
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break;
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case MVT::f64:
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if (FPR_remaining > 0 && GPR_remaining > 0 && isVarArg) {
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--FPR_remaining;
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} else if (FPR_remaining > 0) {
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--FPR_remaining;
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if (GPR_remaining > 0) --GPR_remaining;
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if (GPR_remaining > 0) --GPR_remaining;
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} else {
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Stores.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
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Args[i].first, PtrOff));
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}
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ArgOffset += 8;
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break;
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}
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}
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args_to_use.push_back(Args[i].first);
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Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, Stores);
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}
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std::vector<MVT::ValueType> RetVals;
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@ -364,6 +465,9 @@ static unsigned canUseAsImmediateForOpcode(SDOperand N, unsigned Opcode,
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if (v >= 0 && v <= 65535) { Imm = v & 0xFFFF; return 1; }
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if ((v & 0x0000FFFF) == 0) { Imm = v >> 16; return 2; }
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break;
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case ISD::MUL:
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if (v <= 32767 && v >= -32768) { Imm = v & 0xFFFF; return 1; }
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break;
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}
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return 0;
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}
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@ -813,8 +917,12 @@ unsigned ISel::SelectExpr(SDOperand N) {
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case ISD::MUL:
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assert (DestType == MVT::i32 && "Only do arithmetic on i32s!");
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Tmp1 = SelectExpr(N.getOperand(0));
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Tmp2 = SelectExpr(N.getOperand(1));
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BuildMI(BB, PPC::MULLW, 2, Result).addReg(Tmp2).addReg(Tmp1);
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if (1 == canUseAsImmediateForOpcode(N.getOperand(1), opcode, Tmp2))
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BuildMI(BB, PPC::MULLI, 2, Result).addReg(Tmp1).addSImm(Tmp2);
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else {
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Tmp2 = SelectExpr(N.getOperand(1));
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BuildMI(BB, PPC::MULLW, 2, Result).addReg(Tmp1).addReg(Tmp2);
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}
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return Result;
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case ISD::ADD_PARTS:
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