From e6ecf513a1f32077cbc2ca2bf7c4fdabb8b873d7 Mon Sep 17 00:00:00 2001 From: "Vikram S. Adve" Date: Thu, 8 Nov 2001 05:22:43 +0000 Subject: [PATCH] Include handle to TargetMachine in each Machine...Info class. llvm-svn: 1201 --- llvm/include/llvm/Target/TargetRegInfo.h | 8 +++++--- llvm/include/llvm/Target/TargetSchedInfo.h | 6 ++++-- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/llvm/include/llvm/Target/TargetRegInfo.h b/llvm/include/llvm/Target/TargetRegInfo.h index 9983629ad023..8f7fad571156 100644 --- a/llvm/include/llvm/Target/TargetRegInfo.h +++ b/llvm/include/llvm/Target/TargetRegInfo.h @@ -12,6 +12,7 @@ #include #include +class TargetMachine; class IGNode; class Value; class LiveRangeInfo; @@ -37,7 +38,6 @@ class BasicBlock; class MachineRegClassInfo { - protected: const unsigned RegClassID; // integer ID of a reg class @@ -59,7 +59,7 @@ public: MachineRegClassInfo(const unsigned ID, const unsigned NVR, const unsigned NAR): RegClassID(ID), NumOfAvailRegs(NVR), - NumOfAllRegs(NAR) + NumOfAllRegs(NAR) { } // empty constructor }; @@ -83,6 +83,8 @@ typedef vector MachineRegClassArrayType; class MachineRegInfo : public NonCopyableV { +public: + const TargetMachine& target; protected: @@ -190,7 +192,7 @@ public: //virtual void printReg(const LiveRange *const LR) const =0; - MachineRegInfo() { } + MachineRegInfo(const TargetMachine& tgt) : target(tgt) { } }; diff --git a/llvm/include/llvm/Target/TargetSchedInfo.h b/llvm/include/llvm/Target/TargetSchedInfo.h index 4730bffc9139..356c7851b03f 100644 --- a/llvm/include/llvm/Target/TargetSchedInfo.h +++ b/llvm/include/llvm/Target/TargetSchedInfo.h @@ -280,6 +280,8 @@ InstrRUsage::addUsageDelta(const InstrRUsageDelta& delta) class MachineSchedInfo : public NonCopyableV { public: + const TargetMachine& target; + unsigned int maxNumIssueTotal; int longestIssueConflict; @@ -305,8 +307,8 @@ protected: } public: - /*ctor*/ MachineSchedInfo (int _numSchedClasses, - const MachineInstrInfo* _mii, + /*ctor*/ MachineSchedInfo (const TargetMachine& tgt, + int _numSchedClasses, const InstrClassRUsage* _classRUsages, const InstrRUsageDelta* _usageDeltas, const InstrIssueDelta* _issueDeltas,