maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Fix the case when reordering shuffle and binop produces a constant. 

This resolves PR19737.

llvm-svn: 208762
This commit is contained in:
Serge Pavlov 2014-05-14 09:05:09 +00:00
parent 9f9492b657
commit e6de9e39a8
2 changed files with 24 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
View File

@ -1085,18 +1085,18 @@ Value *InstCombiner::Descale(Value *Val, APInt Scale, bool &NoSignedWrap) {
/// \brief Creates node of binary operation with the same attributes as the
/// specified one but with other operands.
static BinaryOperator *CreateBinOpAsGiven(BinaryOperator &Inst, Value *LHS,
Value *RHS,
InstCombiner::BuilderTy *B) {
BinaryOperator *NewBO = cast<BinaryOperator>(B->CreateBinOp(Inst.getOpcode(),
LHS, RHS));
if (isa<OverflowingBinaryOperator>(NewBO)) {
NewBO->setHasNoSignedWrap(Inst.hasNoSignedWrap());
NewBO->setHasNoUnsignedWrap(Inst.hasNoUnsignedWrap());
static Value *CreateBinOpAsGiven(BinaryOperator &Inst, Value *LHS, Value *RHS,
InstCombiner::BuilderTy *B) {
Value *BORes = B->CreateBinOp(Inst.getOpcode(), LHS, RHS);
if (BinaryOperator *NewBO = dyn_cast<BinaryOperator>(BORes)) {
if (isa<OverflowingBinaryOperator>(NewBO)) {
NewBO->setHasNoSignedWrap(Inst.hasNoSignedWrap());
NewBO->setHasNoUnsignedWrap(Inst.hasNoUnsignedWrap());
}
if (isa<PossiblyExactOperator>(NewBO))
NewBO->setIsExact(Inst.isExact());
}
if (isa<PossiblyExactOperator>(NewBO))
NewBO->setIsExact(Inst.isExact());
return NewBO;
return BORes;
}
/// \brief Makes transformation of binary operation specific for vector types.
@ -1122,7 +1122,7 @@ Value *InstCombiner::SimplifyVectorOp(BinaryOperator &Inst) {
isa<UndefValue>(RShuf->getOperand(1)) &&
LShuf->getOperand(0)->getType() == RShuf->getOperand(0)->getType() &&
LShuf->getMask() == RShuf->getMask()) {
BinaryOperator *NewBO = CreateBinOpAsGiven(Inst, LShuf->getOperand(0),
Value *NewBO = CreateBinOpAsGiven(Inst, LShuf->getOperand(0),
RShuf->getOperand(0), Builder);
Value *Res = Builder->CreateShuffleVector(NewBO,
UndefValue::get(NewBO->getType()), LShuf->getMask());
@ -1168,7 +1168,7 @@ Value *InstCombiner::SimplifyVectorOp(BinaryOperator &Inst) {
NewLHS = Shuffle->getOperand(0);
NewRHS = C2;
}
BinaryOperator *NewBO = CreateBinOpAsGiven(Inst, NewLHS, NewRHS, Builder);
Value *NewBO = CreateBinOpAsGiven(Inst, NewLHS, NewRHS, Builder);
Value *Res = Builder->CreateShuffleVector(NewBO,
UndefValue::get(Inst.getType()), Shuffle->getMask());
return Res;

11
llvm/test/Transforms/InstCombine/vec_shuffle.ll
View File

@ -394,3 +394,14 @@ define <8 x i8> @pr19730(<16 x i8> %in0) {
%shuffle1 = shufflevector <8 x i8> %shuffle, <8 x i8> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
ret <8 x i8> %shuffle1
}
define i32 @pr19737(<4 x i32> %in0) {
; CHECK-LABEL: @pr19737(
; CHECK: [[VAR:%[a-zA-Z0-9.]+]] = extractelement <4 x i32> %in0, i32 0
; CHECK: ret i32 [[VAR]]
%shuffle.i = shufflevector <4 x i32> zeroinitializer, <4 x i32> %in0, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
%neg.i = xor <4 x i32> %shuffle.i, <i32 -1, i32 -1, i32 -1, i32 -1>
%and.i = and <4 x i32> %in0, %neg.i
%rv = extractelement <4 x i32> %and.i, i32 0
ret i32 %rv
}