forked from OSchip/llvm-project
[NFC][AArch64] Autogenerate assembly checklines in arm64-instruction-mix-remarks.ll
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@ -1,14 +1,8 @@
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; RUN: llc -mtriple=arm64-apple-ios7.0 -pass-remarks-output=%t -pass-remarks=asm-printer -o - %s | FileCheck %s
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; RUN: FileCheck --input-file=%t --check-prefix=YAML %s
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=arm64-apple-ios7.0 | FileCheck %s
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; CHECK-LABEL: %entry
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; CHECK-NEXT: ldr w8, [x0]
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; CHECK-NEXT: mov w10, #16959
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; CHECK-NEXT: movk w10, #15, lsl #16
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; CHECK-NEXT: add w8, w8, w1
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; CHECK-NEXT: add x9, x8, x2
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; CHECK-NEXT: cmp x9, x10
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; CHECK-NEXT: b.ne LBB0_2
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; RUN: llc -mtriple=arm64-apple-ios7.0 -pass-remarks-output=%t -pass-remarks=asm-printer -o - %s
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; RUN: FileCheck --input-file=%t --check-prefix=YAML %s
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; YAML: Name: InstructionMix
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; YAML-NEXT: DebugLoc: { File: arm64-instruction-mix-remarks.ll, Line: 10, Column: 10 }
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@ -22,11 +16,6 @@
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; YAML: - INST_movz: '1'
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; YAML: - INST_subs: '1'
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; CHECK-LABEL: %then
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; CHECK-NEXT: mov w0, w8
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; CHECK-NEXT: ret
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; YAML: Name: InstructionMix
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; YAML-NEXT: DebugLoc: { File: arm64-instruction-mix-remarks.ll, Line: 20, Column: 20 }
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; YAML-NEXT: Function: foo
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@ -35,14 +24,6 @@
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; YAML: - INST_orr: '1'
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; YAML: - INST_ret: '1'
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; CHECK-LABEL: %else
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; CHECK-NEXT: mul w8, w8, w1
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; CHECK-NEXT: mov w9, #10
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; CHECK-NEXT: mul w8, w8, w1
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; CHECK-NEXT: str w9, [x0]
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; CHECK-NEXT: mov w0, w8
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; CHECK-NEXT: ret
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; YAML: Name: InstructionMix
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; YAML-NEXT: DebugLoc: { File: arm64-instruction-mix-remarks.ll, Line: 30, Column: 30 }
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; YAML-NEXT: Function: foo
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@ -53,6 +34,25 @@
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; YAML: - INST_ret: '1'
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; YAML: - INST_str: '1'
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define i32 @foo(i32* %ptr, i32 %x, i64 %y) !dbg !3 {
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; CHECK-LABEL: foo:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: ldr w8, [x0]
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; CHECK-NEXT: mov w10, #16959
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; CHECK-NEXT: movk w10, #15, lsl #16
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; CHECK-NEXT: add w8, w8, w1
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; CHECK-NEXT: add x9, x8, x2
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; CHECK-NEXT: cmp x9, x10
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; CHECK-NEXT: b.ne LBB0_2
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; CHECK-NEXT: ; %bb.1: ; %then
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; CHECK-NEXT: mov w0, w8
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; CHECK-NEXT: ret
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; CHECK-NEXT: LBB0_2: ; %else
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; CHECK-NEXT: mul w8, w8, w1
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; CHECK-NEXT: mov w9, #10
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; CHECK-NEXT: mul w8, w8, w1
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; CHECK-NEXT: str w9, [x0]
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; CHECK-NEXT: mov w0, w8
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; CHECK-NEXT: ret
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entry:
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%l = load i32, i32* %ptr, !dbg !4
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%add = add i32 %l, %x, !dbg !4
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