maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Add new function MachineInstrInfo::CreateZeroExtensionInstructions. 

llvm-svn: 3582
This commit is contained in:
Vikram S. Adve 2002-09-05 18:36:41 +00:00
parent f5d585d185
commit e6834a1ce5
2 changed files with 36 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
llvm/include/llvm/Target/MachineInstrInfo.h
View File

@ -299,11 +299,27 @@ public:
// Create instruction sequence to produce a sign-extended register value
// from an arbitrary sized value (sized in bits, not bytes).
// The generated instructions are appended to `mvec'.
// Any temp. registers (TmpInstruction) created are recorded in mcfi.
// Any stack space required is allocated via mcff.
//
virtual void CreateSignExtensionInstructions(const TargetMachine& target,
Function* F,
Value* unsignedSrcVal,
Value* srcVal,
unsigned int srcSizeInBits,
Value* dest,
std::vector<MachineInstr*>& mvec,
MachineCodeForInstruction& mcfi) const=0;
// Create instruction sequence to produce a zero-extended register value
// from an arbitrary sized value (sized in bits, not bytes).
// The generated instructions are appended to `mvec'.
// Any temp. registers (TmpInstruction) created are recorded in mcfi.
// Any stack space required is allocated via mcff.
//
virtual void CreateZeroExtensionInstructions(const TargetMachine& target,
Function* F,
Value* srcVal,
unsigned int srcSizeInBits,
Value* dest,
std::vector<MachineInstr*>& mvec,

18
llvm/include/llvm/Target/TargetInstrInfo.h
View File

@ -299,11 +299,27 @@ public:
// Create instruction sequence to produce a sign-extended register value
// from an arbitrary sized value (sized in bits, not bytes).
// The generated instructions are appended to `mvec'.
// Any temp. registers (TmpInstruction) created are recorded in mcfi.
// Any stack space required is allocated via mcff.
//
virtual void CreateSignExtensionInstructions(const TargetMachine& target,
Function* F,
Value* unsignedSrcVal,
Value* srcVal,
unsigned int srcSizeInBits,
Value* dest,
std::vector<MachineInstr*>& mvec,
MachineCodeForInstruction& mcfi) const=0;
// Create instruction sequence to produce a zero-extended register value
// from an arbitrary sized value (sized in bits, not bytes).
// The generated instructions are appended to `mvec'.
// Any temp. registers (TmpInstruction) created are recorded in mcfi.
// Any stack space required is allocated via mcff.
//
virtual void CreateZeroExtensionInstructions(const TargetMachine& target,
Function* F,
Value* srcVal,
unsigned int srcSizeInBits,
Value* dest,
std::vector<MachineInstr*>& mvec,