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[X86][SSE] LowerScalarImmediateShift - use APInt::getLowBitsSet for vXi8 ISD::SRL mask generation. NFCI. 

Match what we do for ISD::SHL
This commit is contained in:
Simon Pilgrim 2021-02-01 17:23:02 +00:00
parent f0129cc35e
commit e640b209b2
1 changed files with 2 additions and 2 deletions
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4
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -27777,8 +27777,8 @@ static SDValue LowerScalarImmediateShift(SDValue Op, SelectionDAG &DAG,
ShiftAmt, DAG);
SRL = DAG.getBitcast(VT, SRL);
// Zero out the leftmost bits.
return DAG.getNode(ISD::AND, dl, VT, SRL,
DAG.getConstant(uint8_t(-1U) >> ShiftAmt, dl, VT));
APInt Mask = APInt::getLowBitsSet(8, 8 - ShiftAmt);
return DAG.getNode(ISD::AND, dl, VT, SRL, DAG.getConstant(Mask, dl, VT));
}
if (Op.getOpcode() == ISD::SRA) {
// ashr(R, Amt) === sub(xor(lshr(R, Amt), Mask), Mask)