forked from OSchip/llvm-project
Revert "[X86][AVX512] Adding a pattern for broadcastm intrinsic."
This reverts commit r316890. Change-Id: I683cceee9848ef309b452293086b1f26a941950d llvm-svn: 316894
This commit is contained in:
Jina Nahias
parent
a6b1fbece1
commit
e63db55c67
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@ -6687,44 +6687,6 @@ static bool isUseOfShuffle(SDNode *N) {
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return false;
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}
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// Check if the current node of build vector is a zero extended vector.
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// If so, return the value extended.
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// For example: (0,0,0,a,0,0,0,a,0,0,0,a,0,0,0,a) returns a.
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// NumElt - return the number of zero extended identical values.
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// EltType - return the type of the value include the zero extend.
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static SDValue isSplatZeroExtended(const BuildVectorSDNode *Op,
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unsigned &NumElt, MVT &EltType) {
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SDValue ExtValue = Op->getOperand(0);
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unsigned NumElts = Op->getNumOperands();
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unsigned Delta = NumElts;
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for (unsigned i = 1; i < NumElts; i++) {
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if (Op->getOperand(i) == ExtValue) {
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Delta = i;
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break;
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}
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if (!(Op->getOperand(i).isUndef() || isNullConstant(Op->getOperand(i))))
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return SDValue();
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}
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if (!isPowerOf2_32(Delta) || Delta == 1)
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return SDValue();
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for (unsigned i = Delta; i < NumElts; i++) {
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if (i % Delta == 0) {
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if (Op->getOperand(i) != ExtValue)
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return SDValue();
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} else if (!(isNullConstant(Op->getOperand(i)) ||
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Op->getOperand(i).isUndef()))
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return SDValue();
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}
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unsigned EltSize =
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Op->getSimpleValueType(0).getScalarSizeInBits();
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unsigned ExtVTSize = EltSize * Delta;
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EltType = MVT::getIntegerVT(ExtVTSize);
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NumElt = NumElts / Delta;
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return ExtValue;
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}
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/// Attempt to use the vbroadcast instruction to generate a splat value
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/// from a splat BUILD_VECTOR which uses:
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/// a. A single scalar load, or a constant.
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@ -6747,32 +6709,6 @@ static SDValue lowerBuildVectorAsBroadcast(BuildVectorSDNode *BVOp,
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assert((VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector()) &&
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"Unsupported vector type for broadcast.");
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// Attempt to use VBROADCASTM
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// From this paterrn:
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// a. t0 = (zext_i64 (bitcast_i8 v2i1 X))
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// b. t1 = (build_vector t0 t0)
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//
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// Create (VBROADCASTM v2i1 X)
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if (Subtarget.hasCDI() && (VT.is512BitVector() || Subtarget.hasVLX())) {
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MVT EltType;
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unsigned NumElts;
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SDValue ZeroExtended = isSplatZeroExtended(BVOp, NumElts, EltType);
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if (ZeroExtended && ZeroExtended.getOpcode() == ISD::BITCAST) {
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SDValue BOperand = ZeroExtended.getOperand(0);
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if (BOperand.getSimpleValueType().getVectorElementType() == MVT::i1) {
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if ((EltType == MVT::i64 &&
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VT.getVectorElementType() == MVT::i8) || // for broadcastmb2q
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(EltType == MVT::i32 &&
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VT.getVectorElementType() == MVT::i16)) { // for broadcastmw2d
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SDValue Brdcst =
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DAG.getNode(X86ISD::VBROADCASTM, dl,
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MVT::getVectorVT(EltType, NumElts), BOperand);
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return DAG.getBitcast(VT, Brdcst);
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}
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}
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}
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}
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BitVector UndefElements;
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SDValue Ld = BVOp->getSplatValue(&UndefElements);
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@ -20,7 +20,10 @@ define <2 x i64> @test_mm_epi64(<8 x i16> %a, <8 x i16> %b) {
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; AVX512VLCDBW-LABEL: test_mm_epi64:
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; AVX512VLCDBW: # BB#0: # %entry
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; AVX512VLCDBW-NEXT: vpcmpeqw %xmm1, %xmm0, %k0
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; AVX512VLCDBW-NEXT: vpbroadcastmb2q %k0, %xmm0
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; AVX512VLCDBW-NEXT: kmovd %k0, %eax
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; AVX512VLCDBW-NEXT: vpxor %xmm0, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrb $0, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: retq
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;
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; X86-AVX512VLCDBW-LABEL: test_mm_epi64:
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@ -59,13 +62,23 @@ define <4 x i32> @test_mm_epi32(<16 x i8> %a, <16 x i8> %b) {
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; AVX512VLCDBW-LABEL: test_mm_epi32:
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; AVX512VLCDBW: # BB#0: # %entry
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; AVX512VLCDBW-NEXT: vpcmpeqb %xmm1, %xmm0, %k0
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; AVX512VLCDBW-NEXT: vpbroadcastmw2d %k0, %xmm0
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; AVX512VLCDBW-NEXT: kmovd %k0, %eax
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; AVX512VLCDBW-NEXT: vpxor %xmm0, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrw $2, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrw $4, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrw $6, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: retq
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;
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; X86-AVX512VLCDBW-LABEL: test_mm_epi32:
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; X86-AVX512VLCDBW: # BB#0: # %entry
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; X86-AVX512VLCDBW-NEXT: vpcmpeqb %xmm1, %xmm0, %k0
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; X86-AVX512VLCDBW-NEXT: vpbroadcastmw2d %k0, %xmm0
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; X86-AVX512VLCDBW-NEXT: kmovd %k0, %eax
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; X86-AVX512VLCDBW-NEXT: vpxor %xmm0, %xmm0, %xmm0
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; X86-AVX512VLCDBW-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
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; X86-AVX512VLCDBW-NEXT: vpinsrw $2, %eax, %xmm0, %xmm0
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; X86-AVX512VLCDBW-NEXT: vpinsrw $4, %eax, %xmm0, %xmm0
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; X86-AVX512VLCDBW-NEXT: vpinsrw $6, %eax, %xmm0, %xmm0
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; X86-AVX512VLCDBW-NEXT: retl
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entry:
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%0 = icmp eq <16 x i8> %a, %b
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@ -87,13 +100,27 @@ define <16 x i32> @test_mm512_epi32(<16 x i32> %a, <16 x i32> %b) {
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; AVX512VLCDBW-LABEL: test_mm512_epi32:
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; AVX512VLCDBW: # BB#0: # %entry
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; AVX512VLCDBW-NEXT: vpcmpeqd %zmm1, %zmm0, %k0
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; AVX512VLCDBW-NEXT: vpbroadcastmw2d %k0, %zmm0
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; AVX512VLCDBW-NEXT: kmovd %k0, %eax
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; AVX512VLCDBW-NEXT: vpxor %xmm0, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrw $2, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrw $4, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrw $6, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
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; AVX512VLCDBW-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm0
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; AVX512VLCDBW-NEXT: retq
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;
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; X86-AVX512VLCDBW-LABEL: test_mm512_epi32:
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; X86-AVX512VLCDBW: # BB#0: # %entry
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; X86-AVX512VLCDBW-NEXT: vpcmpeqd %zmm1, %zmm0, %k0
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; X86-AVX512VLCDBW-NEXT: vpbroadcastmw2d %k0, %zmm0
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; X86-AVX512VLCDBW-NEXT: kmovd %k0, %eax
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; X86-AVX512VLCDBW-NEXT: vpxor %xmm0, %xmm0, %xmm0
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; X86-AVX512VLCDBW-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
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; X86-AVX512VLCDBW-NEXT: vpinsrw $2, %eax, %xmm0, %xmm0
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; X86-AVX512VLCDBW-NEXT: vpinsrw $4, %eax, %xmm0, %xmm0
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; X86-AVX512VLCDBW-NEXT: vpinsrw $6, %eax, %xmm0, %xmm0
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; X86-AVX512VLCDBW-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
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; X86-AVX512VLCDBW-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm0
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; X86-AVX512VLCDBW-NEXT: retl
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entry:
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%0 = icmp eq <16 x i32> %a, %b
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@ -118,7 +145,12 @@ define <8 x i64> @test_mm512_epi64(<8 x i32> %a, <8 x i32> %b) {
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; AVX512VLCDBW-LABEL: test_mm512_epi64:
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; AVX512VLCDBW: # BB#0: # %entry
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; AVX512VLCDBW-NEXT: vpcmpeqd %ymm1, %ymm0, %k0
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; AVX512VLCDBW-NEXT: vpbroadcastmb2q %k0, %zmm0
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; AVX512VLCDBW-NEXT: kmovd %k0, %eax
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; AVX512VLCDBW-NEXT: vpxor %xmm0, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrb $0, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
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; AVX512VLCDBW-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm0
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; AVX512VLCDBW-NEXT: retq
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;
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; X86-AVX512VLCDBW-LABEL: test_mm512_epi64:
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@ -156,7 +188,11 @@ define <4 x i64> @test_mm256_epi64(<8 x i32> %a, <8 x i32> %b) {
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; AVX512VLCDBW-LABEL: test_mm256_epi64:
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; AVX512VLCDBW: # BB#0: # %entry
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; AVX512VLCDBW-NEXT: vpcmpeqd %ymm1, %ymm0, %k0
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; AVX512VLCDBW-NEXT: vpbroadcastmb2q %k0, %ymm0
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; AVX512VLCDBW-NEXT: kmovd %k0, %eax
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; AVX512VLCDBW-NEXT: vpxor %xmm0, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrb $0, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
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; AVX512VLCDBW-NEXT: retq
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;
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; X86-AVX512VLCDBW-LABEL: test_mm256_epi64:
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@ -196,13 +232,25 @@ define <8 x i32> @test_mm256_epi32(<16 x i16> %a, <16 x i16> %b) {
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; AVX512VLCDBW-LABEL: test_mm256_epi32:
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; AVX512VLCDBW: # BB#0: # %entry
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; AVX512VLCDBW-NEXT: vpcmpeqw %ymm1, %ymm0, %k0
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; AVX512VLCDBW-NEXT: vpbroadcastmw2d %k0, %ymm0
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; AVX512VLCDBW-NEXT: kmovd %k0, %eax
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; AVX512VLCDBW-NEXT: vpxor %xmm0, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrw $2, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrw $4, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vpinsrw $6, %eax, %xmm0, %xmm0
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; AVX512VLCDBW-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
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; AVX512VLCDBW-NEXT: retq
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;
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; X86-AVX512VLCDBW-LABEL: test_mm256_epi32:
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; X86-AVX512VLCDBW: # BB#0: # %entry
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; X86-AVX512VLCDBW-NEXT: vpcmpeqw %ymm1, %ymm0, %k0
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; X86-AVX512VLCDBW-NEXT: vpbroadcastmw2d %k0, %ymm0
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; X86-AVX512VLCDBW-NEXT: kmovd %k0, %eax
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; X86-AVX512VLCDBW-NEXT: vpxor %xmm0, %xmm0, %xmm0
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; X86-AVX512VLCDBW-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
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; X86-AVX512VLCDBW-NEXT: vpinsrw $2, %eax, %xmm0, %xmm0
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; X86-AVX512VLCDBW-NEXT: vpinsrw $4, %eax, %xmm0, %xmm0
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; X86-AVX512VLCDBW-NEXT: vpinsrw $6, %eax, %xmm0, %xmm0
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; X86-AVX512VLCDBW-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
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; X86-AVX512VLCDBW-NEXT: retl
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entry:
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%0 = icmp eq <16 x i16> %a, %b
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