maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Allow target to provide its own hazard recognizer to post-ra scheduler. 

llvm-svn: 105862
This commit is contained in:
Evan Cheng 2010-06-12 00:12:18 +00:00
parent cb1fe56fd9
commit e60273fd70
2 changed files with 27 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
llvm/include/llvm/Target/TargetInstrInfo.h
View File

@ -20,12 +20,14 @@
namespace llvm {
class CalleeSavedInfo;
class InstrItineraryData;
class LiveVariables;
class MCAsmInfo;
class MachineMemOperand;
class MDNode;
class MCInst;
class SDNode;
class ScheduleHazardRecognizer;
class SelectionDAG;
class TargetRegisterClass;
class TargetRegisterInfo;
@ -575,6 +577,12 @@ public:
/// length.
virtual unsigned getInlineAsmLength(const char *Str,
const MCAsmInfo &MAI) const;
/// CreateTargetHazardRecognizer - Allocate and return a hazard recognizer
/// to use for this target when scheduling the machine instructions after
/// register allocation.
virtual ScheduleHazardRecognizer*
CreateTargetPostRAHazardRecognizer(const InstrItineraryData&) const = 0;
};
/// TargetInstrInfoImpl - This is the default implementation of
@ -602,6 +610,9 @@ public:
virtual bool produceSameValue(const MachineInstr *MI0,
const MachineInstr *MI1) const;
virtual unsigned GetFunctionSizeInBytes(const MachineFunction &MF) const;
virtual ScheduleHazardRecognizer *
CreateTargetPostRAHazardRecognizer(const InstrItineraryData&) const;
};
} // End llvm namespace

22
llvm/lib/CodeGen/PostRASchedulerList.cpp
View File

@ -67,8 +67,8 @@ EnableAntiDepBreaking("break-anti-dependencies",
cl::init("none"), cl::Hidden);
static cl::opt<bool>
EnablePostRAHazardAvoidance("avoid-hazards",
cl::desc("Enable exact hazard avoidance"),
cl::init(true), cl::Hidden);
cl::desc("Enable exact hazard avoidance"),
cl::init(true), cl::Hidden);
// If DebugDiv > 0 then only schedule MBB with (ID % DebugDiv) == DebugMod
static cl::opt<int>
@ -237,10 +237,10 @@ bool PostRAScheduler::runOnMachineFunction(MachineFunction &Fn) {
const MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>();
const MachineDominatorTree &MDT = getAnalysis<MachineDominatorTree>();
const InstrItineraryData &InstrItins = Fn.getTarget().getInstrItineraryData();
ScheduleHazardRecognizer *HR = EnablePostRAHazardAvoidance ?
(ScheduleHazardRecognizer *)new ExactHazardRecognizer(InstrItins) :
(ScheduleHazardRecognizer *)new SimpleHazardRecognizer();
const TargetMachine &TM = Fn.getTarget();
const InstrItineraryData &InstrItins = TM.getInstrItineraryData();
ScheduleHazardRecognizer *HR =
TM.getInstrInfo()->CreateTargetPostRAHazardRecognizer(InstrItins);
AntiDepBreaker *ADB =
((AntiDepMode == TargetSubtarget::ANTIDEP_ALL) ?
(AntiDepBreaker *)new AggressiveAntiDepBreaker(Fn, CriticalPathRCs) :
@ -719,6 +719,16 @@ void SchedulePostRATDList::ListScheduleTopDown() {
#endif
}
// Default implementation of CreateTargetPostRAHazardRecognizer. This should
// be in TargetInstrInfoImpl.cpp except it reference local command line
// option EnablePostRAHazardAvoidance
ScheduleHazardRecognizer *TargetInstrInfoImpl::
CreateTargetPostRAHazardRecognizer(const InstrItineraryData &II) const {
if (EnablePostRAHazardAvoidance)
return (ScheduleHazardRecognizer *)new ExactHazardRecognizer(II);
return (ScheduleHazardRecognizer *)new SimpleHazardRecognizer();
}
//===----------------------------------------------------------------------===//
// Public Constructor Functions
//===----------------------------------------------------------------------===//