forked from OSchip/llvm-project
parent
a35ee93a59
commit
e5ce5bb6da
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@ -1821,9 +1821,9 @@ SDOperand DAGCombiner::visitSIGN_EXTEND(SDNode *N) {
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// fold (sext ( extload x)) -> (sext (truncate (sextload x)))
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if ((N0.getOpcode() == ISD::SEXTLOAD || N0.getOpcode() == ISD::EXTLOAD) &&
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N0.hasOneUse()) {
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SDOperand ExtLoad = DAG.getNode(ISD::SEXTLOAD, VT, N0.getOperand(0),
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N0.getOperand(1), N0.getOperand(2),
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N0.getOperand(3));
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MVT::ValueType EVT = cast<VTSDNode>(N0.getOperand(3))->getVT();
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SDOperand ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, VT, N0.getOperand(0),
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N0.getOperand(1), N0.getOperand(2), EVT);
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CombineTo(N, ExtLoad);
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CombineTo(N0.Val, DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad),
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ExtLoad.getValue(1));
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@ -1864,9 +1864,9 @@ SDOperand DAGCombiner::visitZERO_EXTEND(SDNode *N) {
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// fold (zext ( extload x)) -> (zext (truncate (zextload x)))
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if ((N0.getOpcode() == ISD::ZEXTLOAD || N0.getOpcode() == ISD::EXTLOAD) &&
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N0.hasOneUse()) {
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SDOperand ExtLoad = DAG.getNode(ISD::ZEXTLOAD, VT, N0.getOperand(0),
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N0.getOperand(1), N0.getOperand(2),
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N0.getOperand(3));
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MVT::ValueType EVT = cast<VTSDNode>(N0.getOperand(3))->getVT();
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SDOperand ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, VT, N0.getOperand(0),
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N0.getOperand(1), N0.getOperand(2), EVT);
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CombineTo(N, ExtLoad);
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CombineTo(N0.Val, DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad),
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ExtLoad.getValue(1));
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@ -1911,9 +1911,9 @@ SDOperand DAGCombiner::visitANY_EXTEND(SDNode *N) {
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if ((N0.getOpcode() == ISD::ZEXTLOAD || N0.getOpcode() == ISD::EXTLOAD ||
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N0.getOpcode() == ISD::SEXTLOAD) &&
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N0.hasOneUse()) {
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SDOperand ExtLoad = DAG.getNode(N0.getOpcode(), VT, N0.getOperand(0),
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N0.getOperand(1), N0.getOperand(2),
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N0.getOperand(3));
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MVT::ValueType EVT = cast<VTSDNode>(N0.getOperand(3))->getVT();
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SDOperand ExtLoad = DAG.getExtLoad(N0.getOpcode(), VT, N0.getOperand(0),
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N0.getOperand(1), N0.getOperand(2), EVT);
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CombineTo(N, ExtLoad);
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CombineTo(N0.Val, DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad),
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ExtLoad.getValue(1));
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