forked from OSchip/llvm-project
Remove TPat. No patterns depend on just isThumb(). Must use either T1Pat (isThumb1Only()) or T2Pat (is Thumb2).
llvm-svn: 77242
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@ -816,15 +816,6 @@ class TIx2<dag oops, dag iops, string asm, list<dag> pattern>
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class TJTI<dag oops, dag iops, string asm, list<dag> pattern>
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: ThumbI<oops, iops, AddrModeNone, SizeSpecial, asm, "", pattern>;
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// TPat - Same as Pat<>, but requires that the compiler be in Thumb mode.
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class TPat<dag pattern, dag result> : Pat<pattern, result> {
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list<Predicate> Predicates = [IsThumb];
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}
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class Tv5Pat<dag pattern, dag result> : Pat<pattern, result> {
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list<Predicate> Predicates = [IsThumb, HasV5T];
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}
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// Thumb1 only
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class Thumb1I<dag oops, dag iops, AddrMode am, SizeFlagVal sz,
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string asm, string cstr, list<dag> pattern>
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@ -894,10 +885,6 @@ class T1pI4<dag oops, dag iops, string opc, string asm, list<dag> pattern>
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class T1pIs<dag oops, dag iops, string opc, string asm, list<dag> pattern>
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: Thumb1pI<oops, iops, AddrModeT1_s, Size2Bytes, opc, asm, "", pattern>;
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class T1Pat<dag pattern, dag result> : Pat<pattern, result> {
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list<Predicate> Predicates = [IsThumb1Only];
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}
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// Thumb2I - Thumb2 instruction. Almost all Thumb2 instructions are predicable.
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class Thumb2I<dag oops, dag iops, AddrMode am, SizeFlagVal sz,
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string opc, string asm, string cstr, list<dag> pattern>
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@ -967,6 +954,15 @@ class T2Iidxldst<dag oops, dag iops, AddrMode am, IndexMode im,
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list<Predicate> Predicates = [IsThumb2];
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}
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// Tv5Pat - Same as Pat<>, but requires V5T Thumb mode.
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class Tv5Pat<dag pattern, dag result> : Pat<pattern, result> {
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list<Predicate> Predicates = [IsThumb1Only, HasV5T];
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}
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// T1Pat - Same as Pat<>, but requires that the compiler be in Thumb1 mode.
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class T1Pat<dag pattern, dag result> : Pat<pattern, result> {
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list<Predicate> Predicates = [IsThumb1Only];
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}
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// T2Pat - Same as Pat<>, but requires that the compiler be in Thumb2 mode.
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class T2Pat<dag pattern, dag result> : Pat<pattern, result> {
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@ -575,31 +575,31 @@ let isCall = 1,
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//
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// Add with carry
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def : TPat<(addc tGPR:$lhs, imm0_7:$rhs),
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(tADDi3 tGPR:$lhs, imm0_7:$rhs)>;
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def : TPat<(addc tGPR:$lhs, imm8_255:$rhs),
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(tADDi3 tGPR:$lhs, imm8_255:$rhs)>;
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def : TPat<(addc tGPR:$lhs, tGPR:$rhs),
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(tADDrr tGPR:$lhs, tGPR:$rhs)>;
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def : T1Pat<(addc tGPR:$lhs, imm0_7:$rhs),
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(tADDi3 tGPR:$lhs, imm0_7:$rhs)>;
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def : T1Pat<(addc tGPR:$lhs, imm8_255:$rhs),
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(tADDi3 tGPR:$lhs, imm8_255:$rhs)>;
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def : T1Pat<(addc tGPR:$lhs, tGPR:$rhs),
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(tADDrr tGPR:$lhs, tGPR:$rhs)>;
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// Subtract with carry
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def : TPat<(addc tGPR:$lhs, imm0_7_neg:$rhs),
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(tSUBi3 tGPR:$lhs, imm0_7_neg:$rhs)>;
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def : TPat<(addc tGPR:$lhs, imm8_255_neg:$rhs),
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(tSUBi8 tGPR:$lhs, imm8_255_neg:$rhs)>;
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def : TPat<(subc tGPR:$lhs, tGPR:$rhs),
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(tSUBrr tGPR:$lhs, tGPR:$rhs)>;
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def : T1Pat<(addc tGPR:$lhs, imm0_7_neg:$rhs),
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(tSUBi3 tGPR:$lhs, imm0_7_neg:$rhs)>;
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def : T1Pat<(addc tGPR:$lhs, imm8_255_neg:$rhs),
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(tSUBi8 tGPR:$lhs, imm8_255_neg:$rhs)>;
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def : T1Pat<(subc tGPR:$lhs, tGPR:$rhs),
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(tSUBrr tGPR:$lhs, tGPR:$rhs)>;
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// ConstantPool, GlobalAddress
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def : TPat<(ARMWrapper tglobaladdr :$dst), (tLEApcrel tglobaladdr :$dst)>;
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def : TPat<(ARMWrapper tconstpool :$dst), (tLEApcrel tconstpool :$dst)>;
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def : T1Pat<(ARMWrapper tglobaladdr :$dst), (tLEApcrel tglobaladdr :$dst)>;
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def : T1Pat<(ARMWrapper tconstpool :$dst), (tLEApcrel tconstpool :$dst)>;
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// JumpTable
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def : TPat<(ARMWrapperJT tjumptable:$dst, imm:$id),
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(tLEApcrelJT tjumptable:$dst, imm:$id)>;
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def : T1Pat<(ARMWrapperJT tjumptable:$dst, imm:$id),
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(tLEApcrelJT tjumptable:$dst, imm:$id)>;
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// Direct calls
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def : TPat<(ARMtcall texternalsym:$func), (tBL texternalsym:$func)>;
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def : T1Pat<(ARMtcall texternalsym:$func), (tBL texternalsym:$func)>;
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def : Tv5Pat<(ARMcall texternalsym:$func), (tBLXi texternalsym:$func)>;
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// Indirect calls to ARM routines
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