forked from OSchip/llvm-project
Remove the late DCE in RegisterCoalescer.
Dead code and joined copies are now eliminated on the fly, and there is no need for a post pass. This makes the coalescer work like other modern register allocator passes: Code is changed on the fly, there is no pending list of changes to be committed. llvm-svn: 157132
This commit is contained in:
Jakob Stoklund Olesen
parent
25ced18407
commit
e59d0c3252
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@ -54,7 +54,6 @@ STATISTIC(numCrossRCs , "Number of cross class joins performed");
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STATISTIC(numCommutes , "Number of instruction commuting performed");
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STATISTIC(numExtends , "Number of copies extended");
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STATISTIC(NumReMats , "Number of instructions re-materialized");
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STATISTIC(numPeep , "Number of identity moves eliminated after coalescing");
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STATISTIC(NumInflated , "Number of register classes inflated");
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static cl::opt<bool>
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@ -81,14 +80,6 @@ namespace {
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AliasAnalysis *AA;
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RegisterClassInfo RegClassInfo;
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/// JoinedCopies - Keep track of copies eliminated due to coalescing.
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///
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SmallPtrSet<MachineInstr*, 32> JoinedCopies;
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/// ReMatDefs - Keep track of definition instructions which have
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/// been remat'ed.
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SmallPtrSet<MachineInstr*, 8> ReMatDefs;
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/// WorkList - Copy instructions yet to be coalesced.
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SmallVector<MachineInstr*, 8> WorkList;
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@ -167,14 +158,6 @@ namespace {
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/// subregister.
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void updateRegDefsUses(unsigned SrcReg, unsigned DstReg, unsigned SubIdx);
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/// removeDeadDef - If a def of a live interval is now determined dead,
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/// remove the val# it defines. If the live interval becomes empty, remove
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/// it as well.
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bool removeDeadDef(LiveInterval &li, MachineInstr *DefMI);
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/// markAsJoined - Remember that CopyMI has already been joined.
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void markAsJoined(MachineInstr *CopyMI);
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/// eliminateUndefCopy - Handle copies of undef values.
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bool eliminateUndefCopy(MachineInstr *CopyMI, const CoalescerPair &CP);
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@ -384,18 +367,6 @@ void RegisterCoalescer::getAnalysisUsage(AnalysisUsage &AU) const {
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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void RegisterCoalescer::markAsJoined(MachineInstr *CopyMI) {
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/// Joined copies are not deleted immediately, but kept in JoinedCopies.
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JoinedCopies.insert(CopyMI);
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/// Mark all register operands of CopyMI as <undef> so they won't affect dead
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/// code elimination.
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for (MachineInstr::mop_iterator I = CopyMI->operands_begin(),
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E = CopyMI->operands_end(); I != E; ++I)
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if (I->isReg())
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I->setIsUndef(true);
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}
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void RegisterCoalescer::eliminateDeadDefs() {
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SmallVector<LiveInterval*, 8> NewRegs;
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LiveRangeEdit(0, NewRegs, *MF, *LIS, 0, this).eliminateDeadDefs(DeadDefs);
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@ -689,8 +660,6 @@ bool RegisterCoalescer::removeCopyByCommutingDef(const CoalescerPair &CP,
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LiveInterval::iterator ULR = IntA.FindLiveRangeContaining(UseIdx);
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if (ULR == IntA.end() || ULR->valno != AValNo)
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continue;
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if (JoinedCopies.count(UseMI))
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return false;
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// If this use is tied to a def, we can't rewrite the register.
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if (UseMI->isRegTiedToDefOperand(UI.getOperandNo()))
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return false;
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@ -733,8 +702,6 @@ bool RegisterCoalescer::removeCopyByCommutingDef(const CoalescerPair &CP,
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MachineOperand &UseMO = UI.getOperand();
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MachineInstr *UseMI = &*UI;
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++UI;
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if (JoinedCopies.count(UseMI))
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continue;
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if (UseMI->isDebugValue()) {
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// FIXME These don't have an instruction index. Not clear we have enough
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// info to decide whether to do this replacement or not. For now do it.
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@ -873,7 +840,6 @@ bool RegisterCoalescer::reMaterializeTrivialDef(LiveInterval &SrcInt,
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CopyMI->eraseFromParent();
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ErasedInstrs.insert(CopyMI);
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ReMatDefs.insert(DefMI);
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DEBUG(dbgs() << "Remat: " << *NewMI);
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++NumReMats;
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@ -944,14 +910,13 @@ void RegisterCoalescer::updateRegDefsUses(unsigned SrcReg,
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for (MachineRegisterInfo::reg_iterator I = MRI->reg_begin(SrcReg);
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MachineInstr *UseMI = I.skipInstruction();) {
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bool AlreadyJoined = JoinedCopies.count(UseMI);
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SmallVector<unsigned,8> Ops;
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bool Reads, Writes;
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tie(Reads, Writes) = UseMI->readsWritesVirtualRegister(SrcReg, &Ops);
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// If SrcReg wasn't read, it may still be the case that DstReg is live-in
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// because SrcReg is a sub-register.
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if (!Reads && SubIdx && !AlreadyJoined)
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if (!Reads && SubIdx)
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Reads = DstInt.liveAt(LIS->getInstructionIndex(UseMI));
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// Replace SrcReg with DstReg in all UseMI operands.
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@ -961,7 +926,7 @@ void RegisterCoalescer::updateRegDefsUses(unsigned SrcReg,
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// Adjust <undef> flags in case of sub-register joins. We don't want to
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// turn a full def into a read-modify-write sub-register def and vice
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// versa.
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if (SubIdx && !AlreadyJoined && MO.isDef())
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if (SubIdx && MO.isDef())
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MO.setIsUndef(!Reads);
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if (DstIsPhys)
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@ -970,10 +935,6 @@ void RegisterCoalescer::updateRegDefsUses(unsigned SrcReg,
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MO.substVirtReg(DstReg, SubIdx, *TRI);
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}
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// This instruction is a copy that will be removed.
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if (AlreadyJoined)
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continue;
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DEBUG({
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dbgs() << "\t\tupdated: ";
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if (!UseMI->isDebugValue())
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@ -983,37 +944,6 @@ void RegisterCoalescer::updateRegDefsUses(unsigned SrcReg,
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}
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}
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/// removeIntervalIfEmpty - Check if the live interval of a physical register
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/// is empty, if so remove it and also remove the empty intervals of its
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/// sub-registers. Return true if live interval is removed.
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static bool removeIntervalIfEmpty(LiveInterval &li, LiveIntervals *LIS,
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const TargetRegisterInfo *TRI) {
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if (li.empty()) {
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if (TargetRegisterInfo::isPhysicalRegister(li.reg))
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for (const uint16_t* SR = TRI->getSubRegisters(li.reg); *SR; ++SR) {
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if (!LIS->hasInterval(*SR))
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continue;
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LiveInterval &sli = LIS->getInterval(*SR);
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if (sli.empty())
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LIS->removeInterval(*SR);
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}
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LIS->removeInterval(li.reg);
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return true;
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}
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return false;
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}
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/// removeDeadDef - If a def of a live interval is now determined dead, remove
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/// the val# it defines. If the live interval becomes empty, remove it as well.
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bool RegisterCoalescer::removeDeadDef(LiveInterval &li, MachineInstr *DefMI) {
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SlotIndex DefIdx = LIS->getInstructionIndex(DefMI).getRegSlot();
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LiveInterval::iterator MLR = li.FindLiveRangeContaining(DefIdx);
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if (DefIdx != MLR->valno->def)
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return false;
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li.removeValNo(MLR->valno);
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return removeIntervalIfEmpty(li, LIS, TRI);
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}
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/// canJoinPhys - Return true if a copy involving a physreg should be joined.
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bool RegisterCoalescer::canJoinPhys(CoalescerPair &CP) {
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/// Always join simple intervals that are defined by a single copy from a
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@ -1040,9 +970,6 @@ bool RegisterCoalescer::canJoinPhys(CoalescerPair &CP) {
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bool RegisterCoalescer::joinCopy(MachineInstr *CopyMI, bool &Again) {
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Again = false;
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if (JoinedCopies.count(CopyMI))
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return false; // Already done.
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DEBUG(dbgs() << LIS->getInstructionIndex(CopyMI) << '\t' << *CopyMI);
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CoalescerPair CP(*TII, *TRI);
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@ -1646,9 +1573,7 @@ void RegisterCoalescer::joinAllIntervals() {
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}
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void RegisterCoalescer::releaseMemory() {
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JoinedCopies.clear();
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ErasedInstrs.clear();
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ReMatDefs.clear();
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WorkList.clear();
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DeadDefs.clear();
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InflateRegs.clear();
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@ -1696,74 +1621,6 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
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for (MachineBasicBlock::iterator mii = mbb->begin(), mie = mbb->end();
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mii != mie; ) {
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MachineInstr *MI = mii;
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if (JoinedCopies.count(MI)) {
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// Delete all coalesced copies.
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bool DoDelete = true;
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assert(MI->isCopyLike() && "Unrecognized copy instruction");
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unsigned SrcReg = MI->getOperand(MI->isSubregToReg() ? 2 : 1).getReg();
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if (TargetRegisterInfo::isPhysicalRegister(SrcReg) &&
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MI->getNumOperands() > 2)
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// Do not delete extract_subreg, insert_subreg of physical
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// registers unless the definition is dead. e.g.
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// %DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1
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// or else the scavenger may complain. LowerSubregs will
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// delete them later.
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DoDelete = false;
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if (MI->allDefsAreDead()) {
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if (TargetRegisterInfo::isVirtualRegister(SrcReg) &&
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LIS->hasInterval(SrcReg))
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LIS->shrinkToUses(&LIS->getInterval(SrcReg));
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DoDelete = true;
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}
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if (!DoDelete) {
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// We need the instruction to adjust liveness, so make it a KILL.
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if (MI->isSubregToReg()) {
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MI->RemoveOperand(3);
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MI->RemoveOperand(1);
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}
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MI->setDesc(TII->get(TargetOpcode::KILL));
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mii = llvm::next(mii);
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} else {
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LIS->RemoveMachineInstrFromMaps(MI);
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mii = mbbi->erase(mii);
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++numPeep;
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}
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continue;
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}
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// Now check if this is a remat'ed def instruction which is now dead.
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if (ReMatDefs.count(MI)) {
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bool isDead = true;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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if (!MO.isReg())
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continue;
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unsigned Reg = MO.getReg();
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if (!Reg)
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continue;
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DeadDefs.push_back(Reg);
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if (MO.isDead())
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continue;
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if (TargetRegisterInfo::isPhysicalRegister(Reg) ||
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!MRI->use_nodbg_empty(Reg)) {
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isDead = false;
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break;
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}
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}
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if (isDead) {
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while (!DeadDefs.empty()) {
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unsigned DeadDef = DeadDefs.back();
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DeadDefs.pop_back();
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removeDeadDef(LIS->getInterval(DeadDef), MI);
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}
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LIS->RemoveMachineInstrFromMaps(mii);
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mii = mbbi->erase(mii);
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continue;
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} else
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DeadDefs.clear();
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}
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++mii;
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