forked from OSchip/llvm-project
[Hexagon][llvm-objcopy] Add missing check for SHN_HEXAGON_SCOMMON_1
Differential Revision: https://reviews.llvm.org/D82484
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@ -11,10 +11,14 @@ FileHeader:
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Symbols:
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- Name: test
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Index: SHN_COMMON
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Value: 0x1233
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Binding: STB_GLOBAL
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- Name: test1
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Index: SHN_HEXAGON_SCOMMON
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Value: 0x1234
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Binding: STB_GLOBAL
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- Name: test2
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Index: SHN_HEXAGON_SCOMMON
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Index: SHN_HEXAGON_SCOMMON_1
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Value: 0x1235
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Binding: STB_GLOBAL
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- Name: test3
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@ -42,7 +46,7 @@ Symbols:
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#CHECK-NEXT: }
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#CHECK-NEXT: Symbol {
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#CHECK-NEXT: Name: test
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#CHECK-NEXT: Value: 0x1234
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#CHECK-NEXT: Value: 0x1233
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#CHECK-NEXT: Size: 0
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#CHECK-NEXT: Binding: Global (0x1)
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#CHECK-NEXT: Type: None (0x0)
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@ -50,13 +54,22 @@ Symbols:
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#CHECK-NEXT: Section: Common (0xFFF2)
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#CHECK-NEXT: }
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#CHECK-NEXT: Symbol {
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#CHECK-NEXT: Name: test1
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#CHECK-NEXT: Value: 0x1234
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#CHECK-NEXT: Size: 0
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#CHECK-NEXT: Binding: Global (0x1)
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#CHECK-NEXT: Type: None (0x0)
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#CHECK-NEXT: Other: 0
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#CHECK-NEXT: Section: Processor Specific (0xFF00)
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#CHECK-NEXT: }
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#CHECK-NEXT: Symbol {
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#CHECK-NEXT: Name: test2
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#CHECK-NEXT: Value: 0x1235
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#CHECK-NEXT: Size: 0
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#CHECK-NEXT: Binding: Global (0x1)
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#CHECK-NEXT: Type: None (0x0)
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#CHECK-NEXT: Other: 0
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#CHECK-NEXT: Section: Processor Specific (0xFF00)
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#CHECK-NEXT: Section: Processor Specific (0xFF01)
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#CHECK-NEXT: }
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#CHECK-NEXT: Symbol {
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#CHECK-NEXT: Name: test3
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@ -608,6 +608,7 @@ static bool isValidReservedSectionIndex(uint16_t Index, uint16_t Machine) {
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if (Machine == EM_HEXAGON) {
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switch (Index) {
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case SHN_HEXAGON_SCOMMON:
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case SHN_HEXAGON_SCOMMON_1:
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case SHN_HEXAGON_SCOMMON_2:
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case SHN_HEXAGON_SCOMMON_4:
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case SHN_HEXAGON_SCOMMON_8:
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