forked from OSchip/llvm-project
Now that register classes have names, include the name in debug output.
llvm-svn: 68786
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@ -268,9 +268,11 @@ void ScheduleDAGSDNodes::AddOperand(MachineInstr *MI, SDValue Op,
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cerr << "Op->Val = "; Op.getNode()->dump(DAG); cerr << "\n";
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cerr << "MI = "; MI->print(cerr);
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cerr << "VReg = " << VReg << "\n";
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cerr << "VReg RegClass size = " << VRC->getSize()
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cerr << "VReg RegClass " << VRC->getName()
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<< " size = " << VRC->getSize()
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<< ", align = " << VRC->getAlignment() << "\n";
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cerr << "Expected RegClass size = " << RC->getSize()
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cerr << "Expected RegClass " << RC->getName()
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<< " size = " << RC->getSize()
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<< ", align = " << RC->getAlignment() << "\n";
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cerr << "Fatal error, aborting.\n";
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abort();
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