forked from OSchip/llvm-project
[NFC][PowerPC] Add a new MIR file to test mi-peephole pass
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@ -0,0 +1,37 @@
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# RUN: llc -mtriple=powerpc64le--linux-gnu -run-pass ppc-mi-peepholes %s -o - \
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# RUN: -verify-machineinstrs | FileCheck %s
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---
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name: testRLDIC
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alignment: 16
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tracksRegLiveness: true
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registers:
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- { id: 0, class: g8rc }
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- { id: 1, class: g8rc }
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- { id: 2, class: g8rc }
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liveins:
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- { reg: '$x3', virtual-reg: '%0' }
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- { reg: '$x4', virtual-reg: '%1' }
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frameInfo:
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maxAlignment: 1
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machineFunctionInfo: {}
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body: |
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body: |
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bb.0.entry:
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liveins: $x3, $x4
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%1:g8rc = COPY $x4
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%0:g8rc = COPY $x3
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%2:g8rc = RLDICL killed %1, 0, 32
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%3:g8rc = RLDICR %2, 2, 61
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$x3 = COPY %3
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BLR8 implicit $lr8, implicit $rm, implicit $x3
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; CHECK-LABEL: testRLDIC
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; CHECK: bb.0.entry:
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; CHECK: %1:g8rc = COPY $x4
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; CHECK: %0:g8rc = COPY $x3
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; CHECK: %3:g8rc = RLDIC %1, 2, 30
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; CHECK: $x3 = COPY %3
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; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $x3
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...
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