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llvm-mc/AsmParser: Disambiguate i64i8imm. 

llvm-svn: 78598
This commit is contained in:
Daniel Dunbar 2009-08-10 21:06:41 +00:00
parent aeb1feb67a
commit e4f79d140d
2 changed files with 10 additions and 2 deletions
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4
llvm/lib/Target/X86/X86Instr64bit.td
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@ -28,7 +28,9 @@ def i64i32imm_pcrel : Operand<i64> {
// 64-bits but only 8 bits are significant.
def i64i8imm : Operand<i64>;
def i64i8imm : Operand<i64> {
let ParserMatchClass = ImmSExt8AsmOperand;
}
def lea64mem : Operand<i64> {
let PrintMethod = "printlea64mem";

8
llvm/test/MC/AsmParser/x86_instructions.s
View File

@ -1,6 +1,6 @@
// FIXME: Switch back to FileCheck once we print actual instructions
// RUN: llvm-mc -triple i386-unknown-unknown %s > %t
// RUN: llvm-mc -triple x86_64-unknown-unknown %s > %t
// RUN: grep {MCInst(opcode=.*, operands=.reg:2, reg:0, reg:2.)} %t
subb %al, %al
@ -29,4 +29,10 @@
// RUN: grep {MCInst(opcode=.*, operands=.reg:19, reg:0, val:256.)} %t
subl $256, %eax
// FIXME: Check that this matches XOR64ri8
// RUN: grep {MCInst(opcode=.*, operands=.reg:19, reg:0, val:1.)} %t
xorq $1, %eax
// FIXME: Check that this matches XOR64ri32
// RUN: grep {MCInst(opcode=.*, operands=.reg:19, reg:0, val:256.)} %t
xorq $256, %eax