forked from OSchip/llvm-project
Revert "Reland [SROA] Maintain shadow/backing alloca when some slices are noncapturnig read-only calls to allow alloca partitioning/promotion"
There seems to be one more uncaught problem, SROA may now end up trying
to re-re-repromote the just-promoted shadow alloca, and do that endlessly.
This reverts commit adc0984d81.
This commit is contained in:
Roman Lebedev
parent
acf603b947
commit
e47257e251
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@ -167,7 +167,6 @@ public:
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void makeUnsplittable() { UseAndIsSplittable.setInt(false); }
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Use *getUse() const { return UseAndIsSplittable.getPointer(); }
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void setUse(Use *U) { UseAndIsSplittable.setPointer(U); }
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bool isDead() const { return getUse() == nullptr; }
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void kill() { UseAndIsSplittable.setPointer(nullptr); }
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@ -219,7 +218,7 @@ public:
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class llvm::sroa::AllocaSlices {
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public:
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/// Construct the slices of a particular alloca.
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AllocaSlices(const DataLayout &DL, AllocaInst &AI, bool &Changed);
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AllocaSlices(const DataLayout &DL, AllocaInst &AI);
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/// Test whether a pointer to the allocation escapes our analysis.
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///
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@ -271,12 +270,6 @@ public:
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return DeadUseIfPromotable;
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}
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void forgetTheDead() {
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DeadUsers.clear();
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DeadUseIfPromotable.clear();
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DeadOperands.clear();
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};
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/// Access the dead operands referring to this alloca.
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///
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/// These are operands which have cannot actually be used to refer to the
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@ -302,21 +295,11 @@ private:
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friend class AllocaSlices::SliceBuilder;
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void formBackingAlloca(AllocaInst *AI, bool &Changed);
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#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
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/// Handle to alloca instruction to simplify method interfaces.
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AllocaInst &AI;
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#endif
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/// Certain escaping uses of an alloca (non-capturing-ones)
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/// do not prevent promotion, but force retention of the alloca.
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/// This records if there are any such uses.
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bool NeedsBackingAlloca = false;
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/// Track if there are any `select`s/PHI's involving the alloca pointers.
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bool HavePHINodesOrSelectInstrs = false;
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/// The instruction responsible for this alloca not having a known set
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/// of slices.
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///
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@ -1072,10 +1055,6 @@ private:
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return;
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}
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AS.HavePHINodesOrSelectInstrs = true;
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if (AS.NeedsBackingAlloca && AS.HavePHINodesOrSelectInstrs)
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return PI.setAborted(&I);
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insertUse(I, Offset, Size);
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}
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@ -1083,24 +1062,11 @@ private:
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void visitSelectInst(SelectInst &SI) { visitPHINodeOrSelectInst(SI); }
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void visitCallBase(CallBase &CB) {
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if (!IsOffsetKnown || !CB.doesNotCapture(U->getOperandNo()))
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return PI.setAborted(&CB);
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// If we know that the callee does not retain the pointer,
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// then it does not prevent SROA, although we have to workaround this.
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// However, for now, only allow uses, that, at most, read from said memory.
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if (!CB.onlyReadsMemory() && !CB.onlyReadsMemory(U->getOperandNo()))
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return PI.setAborted(&CB);
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AS.NeedsBackingAlloca = true;
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if (AS.NeedsBackingAlloca && AS.HavePHINodesOrSelectInstrs)
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return PI.setAborted(&CB);
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}
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/// Disable SROA entirely if there are unhandled users of the alloca.
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void visitInstruction(Instruction &I) { PI.setAborted(&I); }
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};
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AllocaSlices::AllocaSlices(const DataLayout &DL, AllocaInst &AI, bool &Changed)
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AllocaSlices::AllocaSlices(const DataLayout &DL, AllocaInst &AI)
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:
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#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
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AI(AI),
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@ -1117,10 +1083,6 @@ AllocaSlices::AllocaSlices(const DataLayout &DL, AllocaInst &AI, bool &Changed)
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return;
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}
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// We may have found that the pointer to the AI escapes, but isn't captured.
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if (NeedsBackingAlloca)
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formBackingAlloca(&AI, Changed);
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llvm::erase_if(Slices, [](const Slice &S) { return S.isDead(); });
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// Sort the uses. This arranges for the offsets to be in ascending order,
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@ -3625,122 +3587,6 @@ private:
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} // end anonymous namespace
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/// Apparently, we can promote the alloca, but some uses of the alloca
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/// are calls (that don't capture it's address), which require for the
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/// trace alloca to remain. To do so, we must form a new "backing" alloca,
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/// which will be kept as an up-to-date backup of the to-be-promoted-alloca's
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/// content, and used in it's place in these non-capturing calls.
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/// FIXME: support non-readonly non-capturing calls.
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void AllocaSlices::formBackingAlloca(AllocaInst *AllocaToPromote,
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bool &Changed) {
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assert(NeedsBackingAlloca &&
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"Should not be called if there is no need to rewrite.");
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// We are going to preserve all of the original instructions that were
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// operating on the original alloca, so we must forget any instructions
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// that were deemed as dead-to-be-deleted during normal promotion.
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forgetTheDead();
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Changed = true;
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// Now, we want to retain all of the instructions operating on the original
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// alloca, so to avoid much hassle, create a new alloca, and swap (RAUW) them.
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AllocaInst *ShadowAlloca = cast<AllocaInst>(AllocaToPromote->clone());
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ShadowAlloca->takeName(AllocaToPromote);
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AllocaToPromote->setName(ShadowAlloca->getName() + ".prom");
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ShadowAlloca->insertBefore(AllocaToPromote);
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AllocaToPromote->replaceAllUsesWith(ShadowAlloca);
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// Avoid recomputing the same pointer over and over again, cache it.
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SmallDenseMap<std::pair<uint64_t, Type *>, Value *> RebasedPtrsCSE;
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// Don't do anything fancy, just put new insts "right after" the alloca.
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IRBuilderTy Builder(AllocaToPromote->getContext());
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BasicBlock *AllocaToPromoteBB = AllocaToPromote->getParent();
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Builder.SetInsertPoint(AllocaToPromoteBB,
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AllocaToPromoteBB->getFirstInsertionPt());
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// Give a pointer `Offset` bytes into the `AllocaToPromote` with `PtrTy` type.
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auto getRebasedPtr = [&RebasedPtrsCSE, &Builder, AllocaToPromote,
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DL = AllocaToPromote->getModule()->getDataLayout()](
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PointerType *PtrTy, const uint64_t Offset) {
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// Look it up in a cache first.
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auto It = RebasedPtrsCSE.find({Offset, PtrTy});
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if (It != RebasedPtrsCSE.end())
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return It->second;
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// Otherwise, create a new pointer, and cache it for the future.
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Value *NewPtr = getAdjustedPtr(
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Builder, DL, AllocaToPromote,
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APInt(DL.getIndexSizeInBits(PtrTy->getAddressSpace()), Offset), PtrTy,
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"");
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RebasedPtrsCSE[{Offset, PtrTy}] = NewPtr;
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return NewPtr;
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};
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// Some instructions may have several uses of an alloca, and there's
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// a separate slice for each use, so we must cache each instruction
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// we clone, so that we only clone it once,
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// not for each slice that references it.
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SmallDenseMap<Instruction *, Instruction *> InstrCloneMap;
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// Now, let's just deal with each slice. Roughly, we need to clone each
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// instruction that is referenced by a slice (once per instruction!),
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// and change the appropriate pointer from pointing at the shadow alloca
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// into pointing into the alloca we are going to promote.
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//
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// NOTE: the original instruction is generally preserved,
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// because we need to maintain the content parity between the two allocas!
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for (Slice &S : Slices) {
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// Just completely ignore dead slices.
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if (S.isDead())
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continue;
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// Which instruction does this slice represent?
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Use *OrigUse = S.getUse();
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auto *OrigInstr = cast<Instruction>(OrigUse->getUser());
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// Now, we need to make a clone of this instruction, but operating on
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// the alloca-to-be-promoted instead.
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Instruction *ClonedInstr;
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// Only clone instruction once! See if we already did that for this instr.
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auto It = InstrCloneMap.find(OrigInstr);
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if (It != InstrCloneMap.end())
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ClonedInstr = It->second;
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else {
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// This is the first time this instruction is seen.
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// Clone it next to the original instruction, and cache it.
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ClonedInstr = OrigInstr->clone();
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ClonedInstr->insertBefore(OrigInstr);
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InstrCloneMap.insert({OrigInstr, ClonedInstr});
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// Also, if the instruction was returning anything, we do that instead.
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if (!ClonedInstr->getType()->isVoidTy()) {
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assert(isa<LoadInst>(OrigInstr) &&
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"Not expecting to encounter here anything other than a `load`.");
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ClonedInstr->setName(OrigInstr->getName() + ".prom");
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OrigInstr->replaceAllUsesWith(ClonedInstr);
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}
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if (isa<LoadInst>(OrigInstr))
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// We know that all the offending (non-capturing) calls do not modify
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// the content of the shadow alloca, so we do not need to propagate
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// the content of the shadow alloca to the alloca-to-be-promoted.
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DeadUsers.push_back(OrigInstr);
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}
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// Final touch: the slice should refer to the
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// use of the alloca-to-be-promoted, while it currently refers to
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// use of the shadow alloca, so rectify that.
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Value *NewPtr = getRebasedPtr(cast<PointerType>(OrigUse->get()->getType()),
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S.beginOffset());
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Use &ClonedUse = ClonedInstr->getOperandUse(OrigUse->getOperandNo());
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ClonedUse.set(NewPtr);
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S.setUse(&ClonedUse);
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}
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}
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/// Strip aggregate type wrapping.
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///
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/// This removes no-op aggregate types wrapping an underlying type. It will
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@ -4766,7 +4612,7 @@ bool SROAPass::runOnAlloca(AllocaInst &AI) {
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Changed |= AggRewriter.rewrite(AI);
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// Build the slices using a recursive instruction-visiting builder.
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AllocaSlices AS(DL, AI, Changed);
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AllocaSlices AS(DL, AI);
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LLVM_DEBUG(AS.print(dbgs()));
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if (AS.isEscaped())
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return Changed;
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@ -9,18 +9,19 @@ define i32 @alloca_used_in_call(i32* %data, i64 %n) {
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; CHECK-NEXT: store i32 0, i32* [[RETVAL]], align 4
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[RETVAL_PROM_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[DATA:%.*]], i64 [[INDVARS_IV]]
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; CHECK-NEXT: [[LD:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
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; CHECK-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_PROM_0]], [[LD]]
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; CHECK-NEXT: [[RDX:%.*]] = load i32, i32* [[RETVAL]], align 4
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; CHECK-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
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; CHECK-NEXT: store i32 [[RDX_INC]], i32* [[RETVAL]], align 4
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: [[I0:%.*]] = call i32 @user_of_alloca(i32* [[RETVAL]])
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; CHECK-NEXT: ret i32 [[RDX_INC]]
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; CHECK-NEXT: [[I1:%.*]] = load i32, i32* [[RETVAL]], align 4
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; CHECK-NEXT: ret i32 [[I1]]
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;
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; CHECK-OPAQUE-LABEL: @alloca_used_in_call(
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; CHECK-OPAQUE-NEXT: entry:
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@ -28,18 +29,19 @@ define i32 @alloca_used_in_call(i32* %data, i64 %n) {
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; CHECK-OPAQUE-NEXT: store i32 0, ptr [[RETVAL]], align 4
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; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
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; CHECK-OPAQUE: loop:
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; CHECK-OPAQUE-NEXT: [[RETVAL_PROM_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
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; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
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; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
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; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
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; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
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; CHECK-OPAQUE-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_PROM_0]], [[LD]]
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; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
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; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
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; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
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; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
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; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
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; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
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; CHECK-OPAQUE: exit:
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; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @user_of_alloca(ptr [[RETVAL]])
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; CHECK-OPAQUE-NEXT: ret i32 [[RDX_INC]]
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; CHECK-OPAQUE-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
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; CHECK-OPAQUE-NEXT: ret i32 [[I1]]
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;
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entry:
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%retval = alloca i32, align 4
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@ -196,18 +198,19 @@ define i32 @alloca_not_captured_and_readonly_as_per_operand_attr(i32* %data, i64
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; CHECK-NEXT: store i32 0, i32* [[RETVAL]], align 4
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[RETVAL_PROM_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[DATA:%.*]], i64 [[INDVARS_IV]]
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; CHECK-NEXT: [[LD:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
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; CHECK-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_PROM_0]], [[LD]]
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; CHECK-NEXT: [[RDX:%.*]] = load i32, i32* [[RETVAL]], align 4
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; CHECK-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
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; CHECK-NEXT: store i32 [[RDX_INC]], i32* [[RETVAL]], align 4
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: [[I0:%.*]] = call i32 @capture_of_alloca(i32* nocapture readonly [[RETVAL]])
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; CHECK-NEXT: ret i32 [[RDX_INC]]
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; CHECK-NEXT: [[I1:%.*]] = load i32, i32* [[RETVAL]], align 4
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; CHECK-NEXT: ret i32 [[I1]]
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;
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; CHECK-OPAQUE-LABEL: @alloca_not_captured_and_readonly_as_per_operand_attr(
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; CHECK-OPAQUE-NEXT: entry:
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@ -215,18 +218,19 @@ define i32 @alloca_not_captured_and_readonly_as_per_operand_attr(i32* %data, i64
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; CHECK-OPAQUE-NEXT: store i32 0, ptr [[RETVAL]], align 4
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; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
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; CHECK-OPAQUE: loop:
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; CHECK-OPAQUE-NEXT: [[RETVAL_PROM_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
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; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
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; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
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; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
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; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
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; CHECK-OPAQUE-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_PROM_0]], [[LD]]
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; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
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; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
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; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
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; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
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; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
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; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
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; CHECK-OPAQUE: exit:
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; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @capture_of_alloca(ptr nocapture readonly [[RETVAL]])
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; CHECK-OPAQUE-NEXT: ret i32 [[RDX_INC]]
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; CHECK-OPAQUE-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
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; CHECK-OPAQUE-NEXT: ret i32 [[I1]]
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;
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entry:
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%retval = alloca i32, align 4
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@ -257,18 +261,19 @@ define i32 @alloca_not_captured_as_per_operand_attr_and_readonly_as_per_callbase
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; CHECK-NEXT: store i32 0, i32* [[RETVAL]], align 4
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[RETVAL_PROM_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-NEXT: [[LD:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_PROM_0]], [[LD]]
|
||||
; CHECK-NEXT: [[RDX:%.*]] = load i32, i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-NEXT: store i32 [[RDX_INC]], i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: [[I0:%.*]] = call i32 @capture_of_alloca(i32* nocapture [[RETVAL]]) #[[ATTR2:[0-9]+]]
|
||||
; CHECK-NEXT: ret i32 [[RDX_INC]]
|
||||
; CHECK-NEXT: [[I1:%.*]] = load i32, i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: ret i32 [[I1]]
|
||||
;
|
||||
; CHECK-OPAQUE-LABEL: @alloca_not_captured_as_per_operand_attr_and_readonly_as_per_callbase_attr(
|
||||
; CHECK-OPAQUE-NEXT: entry:
|
||||
|
|
@ -276,18 +281,19 @@ define i32 @alloca_not_captured_as_per_operand_attr_and_readonly_as_per_callbase
|
|||
; CHECK-OPAQUE-NEXT: store i32 0, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK-OPAQUE: loop:
|
||||
; CHECK-OPAQUE-NEXT: [[RETVAL_PROM_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_PROM_0]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
|
||||
; CHECK-OPAQUE: exit:
|
||||
; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @capture_of_alloca(ptr nocapture [[RETVAL]]) #[[ATTR2:[0-9]+]]
|
||||
; CHECK-OPAQUE-NEXT: ret i32 [[RDX_INC]]
|
||||
; CHECK-OPAQUE-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: ret i32 [[I1]]
|
||||
;
|
||||
entry:
|
||||
%retval = alloca i32, align 4
|
||||
|
|
@ -381,11 +387,11 @@ define i32 @alloca_with_gep_used_in_call(i32* %data, i64 %n) {
|
|||
; CHECK-NEXT: store i32 0, i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK: loop:
|
||||
; CHECK-NEXT: [[RETVAL_PROM_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-NEXT: [[LD:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_PROM_0]], [[LD]]
|
||||
; CHECK-NEXT: [[RDX:%.*]] = load i32, i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-NEXT: store i32 [[RDX_INC]], i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
|
|
@ -393,7 +399,8 @@ define i32 @alloca_with_gep_used_in_call(i32* %data, i64 %n) {
|
|||
; CHECK: exit:
|
||||
; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, i32* [[RETVAL]], i32 0
|
||||
; CHECK-NEXT: [[I0:%.*]] = call i32 @user_of_alloca(i32* [[GEP]])
|
||||
; CHECK-NEXT: ret i32 [[RDX_INC]]
|
||||
; CHECK-NEXT: [[I1:%.*]] = load i32, i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: ret i32 [[I1]]
|
||||
;
|
||||
; CHECK-OPAQUE-LABEL: @alloca_with_gep_used_in_call(
|
||||
; CHECK-OPAQUE-NEXT: entry:
|
||||
|
|
@ -401,11 +408,11 @@ define i32 @alloca_with_gep_used_in_call(i32* %data, i64 %n) {
|
|||
; CHECK-OPAQUE-NEXT: store i32 0, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK-OPAQUE: loop:
|
||||
; CHECK-OPAQUE-NEXT: [[RETVAL_PROM_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_PROM_0]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
|
|
@ -413,7 +420,8 @@ define i32 @alloca_with_gep_used_in_call(i32* %data, i64 %n) {
|
|||
; CHECK-OPAQUE: exit:
|
||||
; CHECK-OPAQUE-NEXT: [[GEP:%.*]] = getelementptr i32, ptr [[RETVAL]], i32 0
|
||||
; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @user_of_alloca(ptr [[GEP]])
|
||||
; CHECK-OPAQUE-NEXT: ret i32 [[RDX_INC]]
|
||||
; CHECK-OPAQUE-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: ret i32 [[I1]]
|
||||
;
|
||||
entry:
|
||||
%retval = alloca i32, align 4
|
||||
|
|
@ -508,11 +516,11 @@ define i32 @alloca_used_in_maybe_throwing_call(i32* %data, i64 %n) personality i
|
|||
; CHECK-NEXT: store i32 0, i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK: loop:
|
||||
; CHECK-NEXT: [[RETVAL_PROM_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-NEXT: [[LD:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_PROM_0]], [[LD]]
|
||||
; CHECK-NEXT: [[RDX:%.*]] = load i32, i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-NEXT: store i32 [[RDX_INC]], i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
|
|
@ -527,7 +535,8 @@ define i32 @alloca_used_in_maybe_throwing_call(i32* %data, i64 %n) personality i
|
|||
; CHECK-NEXT: catch i8* null
|
||||
; CHECK-NEXT: br label [[END]]
|
||||
; CHECK: end:
|
||||
; CHECK-NEXT: ret i32 [[RDX_INC]]
|
||||
; CHECK-NEXT: [[I2:%.*]] = load i32, i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: ret i32 [[I2]]
|
||||
;
|
||||
; CHECK-OPAQUE-LABEL: @alloca_used_in_maybe_throwing_call(
|
||||
; CHECK-OPAQUE-NEXT: entry:
|
||||
|
|
@ -535,11 +544,11 @@ define i32 @alloca_used_in_maybe_throwing_call(i32* %data, i64 %n) personality i
|
|||
; CHECK-OPAQUE-NEXT: store i32 0, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK-OPAQUE: loop:
|
||||
; CHECK-OPAQUE-NEXT: [[RETVAL_PROM_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_PROM_0]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
|
|
@ -554,7 +563,8 @@ define i32 @alloca_used_in_maybe_throwing_call(i32* %data, i64 %n) personality i
|
|||
; CHECK-OPAQUE-NEXT: catch ptr null
|
||||
; CHECK-OPAQUE-NEXT: br label [[END]]
|
||||
; CHECK-OPAQUE: end:
|
||||
; CHECK-OPAQUE-NEXT: ret i32 [[RDX_INC]]
|
||||
; CHECK-OPAQUE-NEXT: [[I2:%.*]] = load i32, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: ret i32 [[I2]]
|
||||
;
|
||||
entry:
|
||||
%retval = alloca i32, align 4
|
||||
|
|
@ -594,11 +604,11 @@ define i32 @alloca_used_in_maybe_throwing_call_with_same_dests(i32* %data, i64 %
|
|||
; CHECK-NEXT: store i32 0, i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK: loop:
|
||||
; CHECK-NEXT: [[RETVAL_PROM_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-NEXT: [[LD:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_PROM_0]], [[LD]]
|
||||
; CHECK-NEXT: [[RDX:%.*]] = load i32, i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-NEXT: store i32 [[RDX_INC]], i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
|
|
@ -611,7 +621,8 @@ define i32 @alloca_used_in_maybe_throwing_call_with_same_dests(i32* %data, i64 %
|
|||
; CHECK-NEXT: catch i8* null
|
||||
; CHECK-NEXT: br label [[END]]
|
||||
; CHECK: end:
|
||||
; CHECK-NEXT: ret i32 [[RDX_INC]]
|
||||
; CHECK-NEXT: [[I2:%.*]] = load i32, i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: ret i32 [[I2]]
|
||||
;
|
||||
; CHECK-OPAQUE-LABEL: @alloca_used_in_maybe_throwing_call_with_same_dests(
|
||||
; CHECK-OPAQUE-NEXT: entry:
|
||||
|
|
@ -619,11 +630,11 @@ define i32 @alloca_used_in_maybe_throwing_call_with_same_dests(i32* %data, i64 %
|
|||
; CHECK-OPAQUE-NEXT: store i32 0, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK-OPAQUE: loop:
|
||||
; CHECK-OPAQUE-NEXT: [[RETVAL_PROM_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_PROM_0]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
|
|
@ -636,7 +647,8 @@ define i32 @alloca_used_in_maybe_throwing_call_with_same_dests(i32* %data, i64 %
|
|||
; CHECK-OPAQUE-NEXT: catch ptr null
|
||||
; CHECK-OPAQUE-NEXT: br label [[END]]
|
||||
; CHECK-OPAQUE: end:
|
||||
; CHECK-OPAQUE-NEXT: ret i32 [[RDX_INC]]
|
||||
; CHECK-OPAQUE-NEXT: [[I2:%.*]] = load i32, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: ret i32 [[I2]]
|
||||
;
|
||||
entry:
|
||||
%retval = alloca i32, align 4
|
||||
|
|
@ -677,19 +689,23 @@ define [2 x i32] @part_of_alloca_used_in_call(i32* %data, i64 %n) {
|
|||
; CHECK-NEXT: [[RETVAL:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[RETVAL_FULL]], i64 0, i64 1
|
||||
; CHECK-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK: loop:
|
||||
; CHECK-NEXT: [[RETVAL_FULL_PROM_SROA_2_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-NEXT: [[LD:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_FULL_PROM_SROA_2_0]], [[LD]]
|
||||
; CHECK-NEXT: [[RDX:%.*]] = load i32, i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-NEXT: store i32 [[RDX_INC]], i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: [[I0:%.*]] = call i32 @user_of_alloca(i32* [[RETVAL]])
|
||||
; CHECK-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 0, 0
|
||||
; CHECK-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[RDX_INC]], 1
|
||||
; CHECK-NEXT: [[I1_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[RETVAL_FULL]], i32 0, i32 0
|
||||
; CHECK-NEXT: [[I1_FCA_0_LOAD:%.*]] = load i32, i32* [[I1_FCA_0_GEP]], align 4
|
||||
; CHECK-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I1_FCA_0_LOAD]], 0
|
||||
; CHECK-NEXT: [[I1_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[RETVAL_FULL]], i32 0, i32 1
|
||||
; CHECK-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, i32* [[I1_FCA_1_GEP]], align 4
|
||||
; CHECK-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
|
||||
; CHECK-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
|
||||
;
|
||||
; CHECK-OPAQUE-LABEL: @part_of_alloca_used_in_call(
|
||||
|
|
@ -702,19 +718,23 @@ define [2 x i32] @part_of_alloca_used_in_call(i32* %data, i64 %n) {
|
|||
; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i64 0, i64 1
|
||||
; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK-OPAQUE: loop:
|
||||
; CHECK-OPAQUE-NEXT: [[RETVAL_FULL_PROM_SROA_2_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_FULL_PROM_SROA_2_0]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
|
||||
; CHECK-OPAQUE: exit:
|
||||
; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @user_of_alloca(ptr [[RETVAL]])
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 0, 0
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[RDX_INC]], 1
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_LOAD:%.*]] = load i32, ptr [[I1_FCA_0_GEP]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I1_FCA_0_LOAD]], 0
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, ptr [[I1_FCA_1_GEP]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
|
||||
; CHECK-OPAQUE-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
|
||||
;
|
||||
entry:
|
||||
|
|
@ -752,19 +772,23 @@ define [2 x i32] @all_parts_of_alloca_used_in_call_with_multiple_args(i32* %data
|
|||
; CHECK-NEXT: [[RETVAL:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[RETVAL_FULL]], i64 0, i64 1
|
||||
; CHECK-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK: loop:
|
||||
; CHECK-NEXT: [[RETVAL_FULL_PROM_SROA_2_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-NEXT: [[LD:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_FULL_PROM_SROA_2_0]], [[LD]]
|
||||
; CHECK-NEXT: [[RDX:%.*]] = load i32, i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-NEXT: store i32 [[RDX_INC]], i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: [[I0:%.*]] = call i32 @user_of_alloca_with_multiple_args(i32* [[RETVAL]], i32* [[RETVAL_BASE]])
|
||||
; CHECK-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 0, 0
|
||||
; CHECK-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[RDX_INC]], 1
|
||||
; CHECK-NEXT: [[I1_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[RETVAL_FULL]], i32 0, i32 0
|
||||
; CHECK-NEXT: [[I1_FCA_0_LOAD:%.*]] = load i32, i32* [[I1_FCA_0_GEP]], align 4
|
||||
; CHECK-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I1_FCA_0_LOAD]], 0
|
||||
; CHECK-NEXT: [[I1_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[RETVAL_FULL]], i32 0, i32 1
|
||||
; CHECK-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, i32* [[I1_FCA_1_GEP]], align 4
|
||||
; CHECK-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
|
||||
; CHECK-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
|
||||
;
|
||||
; CHECK-OPAQUE-LABEL: @all_parts_of_alloca_used_in_call_with_multiple_args(
|
||||
|
|
@ -778,19 +802,23 @@ define [2 x i32] @all_parts_of_alloca_used_in_call_with_multiple_args(i32* %data
|
|||
; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i64 0, i64 1
|
||||
; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK-OPAQUE: loop:
|
||||
; CHECK-OPAQUE-NEXT: [[RETVAL_FULL_PROM_SROA_2_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_FULL_PROM_SROA_2_0]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
|
||||
; CHECK-OPAQUE: exit:
|
||||
; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @user_of_alloca_with_multiple_args(ptr [[RETVAL]], ptr [[RETVAL_BASE]])
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 0, 0
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[RDX_INC]], 1
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_LOAD:%.*]] = load i32, ptr [[I1_FCA_0_GEP]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I1_FCA_0_LOAD]], 0
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, ptr [[I1_FCA_1_GEP]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
|
||||
; CHECK-OPAQUE-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
|
||||
;
|
||||
entry:
|
||||
|
|
@ -829,11 +857,11 @@ define [2 x i32] @all_parts_of_alloca_used_in_call_with_multiple_args_with_memcp
|
|||
; CHECK-NEXT: [[RETVAL:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[RETVAL_FULL]], i64 0, i64 1
|
||||
; CHECK-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK: loop:
|
||||
; CHECK-NEXT: [[RETVAL_FULL_PROM_SROA_3_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-NEXT: [[LD:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_FULL_PROM_SROA_3_0]], [[LD]]
|
||||
; CHECK-NEXT: [[RDX:%.*]] = load i32, i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-NEXT: store i32 [[RDX_INC]], i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
|
|
@ -841,8 +869,12 @@ define [2 x i32] @all_parts_of_alloca_used_in_call_with_multiple_args_with_memcp
|
|||
; CHECK: exit:
|
||||
; CHECK-NEXT: call void @llvm.memcpy.p0i32.p0i32.i32(i32* [[RETVAL_BASE]], i32* [[RETVAL]], i32 4, i1 false)
|
||||
; CHECK-NEXT: [[I0:%.*]] = call i32 @user_of_alloca_with_multiple_args(i32* [[RETVAL]], i32* [[RETVAL_BASE]])
|
||||
; CHECK-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[RDX_INC]], 0
|
||||
; CHECK-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[RDX_INC]], 1
|
||||
; CHECK-NEXT: [[I1_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[RETVAL_FULL]], i32 0, i32 0
|
||||
; CHECK-NEXT: [[I1_FCA_0_LOAD:%.*]] = load i32, i32* [[I1_FCA_0_GEP]], align 4
|
||||
; CHECK-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I1_FCA_0_LOAD]], 0
|
||||
; CHECK-NEXT: [[I1_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[RETVAL_FULL]], i32 0, i32 1
|
||||
; CHECK-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, i32* [[I1_FCA_1_GEP]], align 4
|
||||
; CHECK-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
|
||||
; CHECK-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
|
||||
;
|
||||
; CHECK-OPAQUE-LABEL: @all_parts_of_alloca_used_in_call_with_multiple_args_with_memcpy_before_call(
|
||||
|
|
@ -856,11 +888,11 @@ define [2 x i32] @all_parts_of_alloca_used_in_call_with_multiple_args_with_memcp
|
|||
; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i64 0, i64 1
|
||||
; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK-OPAQUE: loop:
|
||||
; CHECK-OPAQUE-NEXT: [[RETVAL_FULL_PROM_SROA_3_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_FULL_PROM_SROA_3_0]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
|
|
@ -868,8 +900,12 @@ define [2 x i32] @all_parts_of_alloca_used_in_call_with_multiple_args_with_memcp
|
|||
; CHECK-OPAQUE: exit:
|
||||
; CHECK-OPAQUE-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr [[RETVAL_BASE]], ptr [[RETVAL]], i32 4, i1 false)
|
||||
; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @user_of_alloca_with_multiple_args(ptr [[RETVAL]], ptr [[RETVAL_BASE]])
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[RDX_INC]], 0
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[RDX_INC]], 1
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_LOAD:%.*]] = load i32, ptr [[I1_FCA_0_GEP]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I1_FCA_0_LOAD]], 0
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, ptr [[I1_FCA_1_GEP]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
|
||||
; CHECK-OPAQUE-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
|
||||
;
|
||||
entry:
|
||||
|
|
@ -909,11 +945,11 @@ define [2 x i32] @all_parts_of_alloca_used_in_call_with_multiple_args_with_memcp
|
|||
; CHECK-NEXT: [[RETVAL:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[RETVAL_FULL]], i64 0, i64 1
|
||||
; CHECK-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK: loop:
|
||||
; CHECK-NEXT: [[RETVAL_FULL_PROM_SROA_3_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-NEXT: [[LD:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_FULL_PROM_SROA_3_0]], [[LD]]
|
||||
; CHECK-NEXT: [[RDX:%.*]] = load i32, i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-NEXT: store i32 [[RDX_INC]], i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
|
|
@ -921,8 +957,12 @@ define [2 x i32] @all_parts_of_alloca_used_in_call_with_multiple_args_with_memcp
|
|||
; CHECK: exit:
|
||||
; CHECK-NEXT: [[I0:%.*]] = call i32 @user_of_alloca_with_multiple_args(i32* [[RETVAL]], i32* [[RETVAL_BASE]])
|
||||
; CHECK-NEXT: call void @llvm.memcpy.p0i32.p0i32.i32(i32* [[RETVAL_BASE]], i32* [[RETVAL]], i32 4, i1 false)
|
||||
; CHECK-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[RDX_INC]], 0
|
||||
; CHECK-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[RDX_INC]], 1
|
||||
; CHECK-NEXT: [[I1_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[RETVAL_FULL]], i32 0, i32 0
|
||||
; CHECK-NEXT: [[I1_FCA_0_LOAD:%.*]] = load i32, i32* [[I1_FCA_0_GEP]], align 4
|
||||
; CHECK-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I1_FCA_0_LOAD]], 0
|
||||
; CHECK-NEXT: [[I1_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[RETVAL_FULL]], i32 0, i32 1
|
||||
; CHECK-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, i32* [[I1_FCA_1_GEP]], align 4
|
||||
; CHECK-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
|
||||
; CHECK-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
|
||||
;
|
||||
; CHECK-OPAQUE-LABEL: @all_parts_of_alloca_used_in_call_with_multiple_args_with_memcpy_after_call(
|
||||
|
|
@ -936,11 +976,11 @@ define [2 x i32] @all_parts_of_alloca_used_in_call_with_multiple_args_with_memcp
|
|||
; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i64 0, i64 1
|
||||
; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK-OPAQUE: loop:
|
||||
; CHECK-OPAQUE-NEXT: [[RETVAL_FULL_PROM_SROA_3_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_FULL_PROM_SROA_3_0]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
|
|
@ -948,8 +988,12 @@ define [2 x i32] @all_parts_of_alloca_used_in_call_with_multiple_args_with_memcp
|
|||
; CHECK-OPAQUE: exit:
|
||||
; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @user_of_alloca_with_multiple_args(ptr [[RETVAL]], ptr [[RETVAL_BASE]])
|
||||
; CHECK-OPAQUE-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr [[RETVAL_BASE]], ptr [[RETVAL]], i32 4, i1 false)
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[RDX_INC]], 0
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[RDX_INC]], 1
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_LOAD:%.*]] = load i32, ptr [[I1_FCA_0_GEP]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I1_FCA_0_LOAD]], 0
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, ptr [[I1_FCA_1_GEP]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
|
||||
; CHECK-OPAQUE-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
|
||||
;
|
||||
entry:
|
||||
|
|
@ -988,19 +1032,23 @@ define [2 x i32] @part_of_alloca_used_in_call_with_multiple_args(i32* %data, i64
|
|||
; CHECK-NEXT: [[RETVAL:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[RETVAL_FULL]], i64 0, i64 1
|
||||
; CHECK-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK: loop:
|
||||
; CHECK-NEXT: [[RETVAL_FULL_PROM_SROA_2_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-NEXT: [[LD:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_FULL_PROM_SROA_2_0]], [[LD]]
|
||||
; CHECK-NEXT: [[RDX:%.*]] = load i32, i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-NEXT: store i32 [[RDX_INC]], i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: [[I0:%.*]] = call i32 @user_of_alloca_with_multiple_args(i32* [[RETVAL]], i32* [[RETVAL]])
|
||||
; CHECK-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 0, 0
|
||||
; CHECK-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[RDX_INC]], 1
|
||||
; CHECK-NEXT: [[I1_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[RETVAL_FULL]], i32 0, i32 0
|
||||
; CHECK-NEXT: [[I1_FCA_0_LOAD:%.*]] = load i32, i32* [[I1_FCA_0_GEP]], align 4
|
||||
; CHECK-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I1_FCA_0_LOAD]], 0
|
||||
; CHECK-NEXT: [[I1_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[RETVAL_FULL]], i32 0, i32 1
|
||||
; CHECK-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, i32* [[I1_FCA_1_GEP]], align 4
|
||||
; CHECK-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
|
||||
; CHECK-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
|
||||
;
|
||||
; CHECK-OPAQUE-LABEL: @part_of_alloca_used_in_call_with_multiple_args(
|
||||
|
|
@ -1013,19 +1061,23 @@ define [2 x i32] @part_of_alloca_used_in_call_with_multiple_args(i32* %data, i64
|
|||
; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i64 0, i64 1
|
||||
; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK-OPAQUE: loop:
|
||||
; CHECK-OPAQUE-NEXT: [[RETVAL_FULL_PROM_SROA_2_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_FULL_PROM_SROA_2_0]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
|
||||
; CHECK-OPAQUE: exit:
|
||||
; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @user_of_alloca_with_multiple_args(ptr [[RETVAL]], ptr [[RETVAL]])
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 0, 0
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[RDX_INC]], 1
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_LOAD:%.*]] = load i32, ptr [[I1_FCA_0_GEP]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I1_FCA_0_LOAD]], 0
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, ptr [[I1_FCA_1_GEP]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
|
||||
; CHECK-OPAQUE-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
|
||||
;
|
||||
entry:
|
||||
|
|
@ -1065,11 +1117,11 @@ define [2 x i32] @all_parts_of_alloca_used_in_calls_with_multiple_args(i32* %dat
|
|||
; CHECK-NEXT: [[SOME_ANOTHER_ALLOCA:%.*]] = getelementptr inbounds [42 x i32], [42 x i32]* [[SOME_ANOTHER_ALLOCA_FULL]], i64 0, i64 0
|
||||
; CHECK-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK: loop:
|
||||
; CHECK-NEXT: [[RETVAL_FULL_PROM_SROA_2_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-NEXT: [[LD:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_FULL_PROM_SROA_2_0]], [[LD]]
|
||||
; CHECK-NEXT: [[RDX:%.*]] = load i32, i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-NEXT: store i32 [[RDX_INC]], i32* [[RETVAL]], align 4
|
||||
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
|
|
@ -1078,8 +1130,12 @@ define [2 x i32] @all_parts_of_alloca_used_in_calls_with_multiple_args(i32* %dat
|
|||
; CHECK-NEXT: [[I0:%.*]] = call i32 @user_of_alloca_with_multiple_args(i32* [[RETVAL]], i32* [[RETVAL_BASE]])
|
||||
; CHECK-NEXT: [[I1:%.*]] = call i32 @user_of_alloca_with_multiple_args(i32* [[RETVAL_BASE]], i32* [[RETVAL]])
|
||||
; CHECK-NEXT: [[I2:%.*]] = call i32 @capture_of_alloca(i32* [[SOME_ANOTHER_ALLOCA]])
|
||||
; CHECK-NEXT: [[I3_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 0, 0
|
||||
; CHECK-NEXT: [[I3_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I3_FCA_0_INSERT]], i32 [[RDX_INC]], 1
|
||||
; CHECK-NEXT: [[I3_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[RETVAL_FULL]], i32 0, i32 0
|
||||
; CHECK-NEXT: [[I3_FCA_0_LOAD:%.*]] = load i32, i32* [[I3_FCA_0_GEP]], align 4
|
||||
; CHECK-NEXT: [[I3_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I3_FCA_0_LOAD]], 0
|
||||
; CHECK-NEXT: [[I3_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[RETVAL_FULL]], i32 0, i32 1
|
||||
; CHECK-NEXT: [[I3_FCA_1_LOAD:%.*]] = load i32, i32* [[I3_FCA_1_GEP]], align 4
|
||||
; CHECK-NEXT: [[I3_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I3_FCA_0_INSERT]], i32 [[I3_FCA_1_LOAD]], 1
|
||||
; CHECK-NEXT: ret [2 x i32] [[I3_FCA_1_INSERT]]
|
||||
;
|
||||
; CHECK-OPAQUE-LABEL: @all_parts_of_alloca_used_in_calls_with_multiple_args(
|
||||
|
|
@ -1095,11 +1151,11 @@ define [2 x i32] @all_parts_of_alloca_used_in_calls_with_multiple_args(i32* %dat
|
|||
; CHECK-OPAQUE-NEXT: [[SOME_ANOTHER_ALLOCA:%.*]] = getelementptr inbounds [42 x i32], ptr [[SOME_ANOTHER_ALLOCA_FULL]], i64 0, i64 0
|
||||
; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK-OPAQUE: loop:
|
||||
; CHECK-OPAQUE-NEXT: [[RETVAL_FULL_PROM_SROA_2_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RDX_INC:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
|
||||
; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC]] = add nsw i32 [[RETVAL_FULL_PROM_SROA_2_0]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
|
||||
; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
|
||||
|
|
@ -1108,8 +1164,12 @@ define [2 x i32] @all_parts_of_alloca_used_in_calls_with_multiple_args(i32* %dat
|
|||
; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @user_of_alloca_with_multiple_args(ptr [[RETVAL]], ptr [[RETVAL_BASE]])
|
||||
; CHECK-OPAQUE-NEXT: [[I1:%.*]] = call i32 @user_of_alloca_with_multiple_args(ptr [[RETVAL_BASE]], ptr [[RETVAL]])
|
||||
; CHECK-OPAQUE-NEXT: [[I2:%.*]] = call i32 @capture_of_alloca(ptr [[SOME_ANOTHER_ALLOCA]])
|
||||
; CHECK-OPAQUE-NEXT: [[I3_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 0, 0
|
||||
; CHECK-OPAQUE-NEXT: [[I3_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I3_FCA_0_INSERT]], i32 [[RDX_INC]], 1
|
||||
; CHECK-OPAQUE-NEXT: [[I3_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
|
||||
; CHECK-OPAQUE-NEXT: [[I3_FCA_0_LOAD:%.*]] = load i32, ptr [[I3_FCA_0_GEP]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[I3_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I3_FCA_0_LOAD]], 0
|
||||
; CHECK-OPAQUE-NEXT: [[I3_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
|
||||
; CHECK-OPAQUE-NEXT: [[I3_FCA_1_LOAD:%.*]] = load i32, ptr [[I3_FCA_1_GEP]], align 4
|
||||
; CHECK-OPAQUE-NEXT: [[I3_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I3_FCA_0_INSERT]], i32 [[I3_FCA_1_LOAD]], 1
|
||||
; CHECK-OPAQUE-NEXT: ret [2 x i32] [[I3_FCA_1_INSERT]]
|
||||
;
|
||||
entry:
|
||||
|
|
@ -1144,7 +1204,6 @@ define i32 @all_uses_of_alloca_are_calls(i32* %data, i64 %n) {
|
|||
; CHECK-LABEL: @all_uses_of_alloca_are_calls(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
|
||||
; CHECK-NEXT: [[RETVAL_PROM:%.*]] = alloca i32, align 4
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @user_of_alloca(i32* [[RETVAL]])
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @user_of_alloca(i32* [[RETVAL]])
|
||||
; CHECK-NEXT: ret i32 0
|
||||
|
|
@ -1152,7 +1211,6 @@ define i32 @all_uses_of_alloca_are_calls(i32* %data, i64 %n) {
|
|||
; CHECK-OPAQUE-LABEL: @all_uses_of_alloca_are_calls(
|
||||
; CHECK-OPAQUE-NEXT: entry:
|
||||
; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
|
||||
; CHECK-OPAQUE-NEXT: [[RETVAL_PROM:%.*]] = alloca i32, align 4
|
||||
; CHECK-OPAQUE-NEXT: [[TMP0:%.*]] = call i32 @user_of_alloca(ptr [[RETVAL]])
|
||||
; CHECK-OPAQUE-NEXT: [[TMP1:%.*]] = call i32 @user_of_alloca(ptr [[RETVAL]])
|
||||
; CHECK-OPAQUE-NEXT: ret i32 0
|
||||
|
|
@ -1178,7 +1236,8 @@ define i64 @do_schedule_instrs_for_dce_after_fixups() {
|
|||
; CHECK: if.end:
|
||||
; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAYDECAY]], i64 1
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @user_of_alloca(i32* [[ADD_PTR]])
|
||||
; CHECK-NEXT: ret i64 0
|
||||
; CHECK-NEXT: [[LD:%.*]] = load i64, i64* [[C]], align 4
|
||||
; CHECK-NEXT: ret i64 [[LD]]
|
||||
;
|
||||
; CHECK-OPAQUE-LABEL: @do_schedule_instrs_for_dce_after_fixups(
|
||||
; CHECK-OPAQUE-NEXT: entry:
|
||||
|
|
@ -1191,7 +1250,8 @@ define i64 @do_schedule_instrs_for_dce_after_fixups() {
|
|||
; CHECK-OPAQUE: if.end:
|
||||
; CHECK-OPAQUE-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAYDECAY]], i64 1
|
||||
; CHECK-OPAQUE-NEXT: [[TMP1:%.*]] = call i32 @user_of_alloca(ptr [[ADD_PTR]])
|
||||
; CHECK-OPAQUE-NEXT: ret i64 0
|
||||
; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i64, ptr [[C]], align 4
|
||||
; CHECK-OPAQUE-NEXT: ret i64 [[LD]]
|
||||
;
|
||||
entry:
|
||||
%c = alloca i64, align 2
|
||||
|
|
@ -1234,13 +1294,15 @@ define i8 @dont_transform_load_only() {
|
|||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[A:%.*]] = alloca i8, align 1
|
||||
; CHECK-NEXT: call void @byte_user_of_alloca(i8* [[A]])
|
||||
; CHECK-NEXT: ret i8 undef
|
||||
; CHECK-NEXT: [[R:%.*]] = load i8, i8* [[A]], align 1
|
||||
; CHECK-NEXT: ret i8 [[R]]
|
||||
;
|
||||
; CHECK-OPAQUE-LABEL: @dont_transform_load_only(
|
||||
; CHECK-OPAQUE-NEXT: entry:
|
||||
; CHECK-OPAQUE-NEXT: [[A:%.*]] = alloca i8, align 1
|
||||
; CHECK-OPAQUE-NEXT: call void @byte_user_of_alloca(ptr [[A]])
|
||||
; CHECK-OPAQUE-NEXT: ret i8 undef
|
||||
; CHECK-OPAQUE-NEXT: [[R:%.*]] = load i8, ptr [[A]], align 1
|
||||
; CHECK-OPAQUE-NEXT: ret i8 [[R]]
|
||||
;
|
||||
entry:
|
||||
%a = alloca i8
|
||||
|
|
@ -1254,14 +1316,16 @@ define i8 @transform_load_and_store() {
|
|||
; CHECK-NEXT: [[A:%.*]] = alloca i8, align 1
|
||||
; CHECK-NEXT: store i8 0, i8* [[A]], align 1
|
||||
; CHECK-NEXT: call void @byte_user_of_alloca(i8* [[A]])
|
||||
; CHECK-NEXT: ret i8 0
|
||||
; CHECK-NEXT: [[R:%.*]] = load i8, i8* [[A]], align 1
|
||||
; CHECK-NEXT: ret i8 [[R]]
|
||||
;
|
||||
; CHECK-OPAQUE-LABEL: @transform_load_and_store(
|
||||
; CHECK-OPAQUE-NEXT: entry:
|
||||
; CHECK-OPAQUE-NEXT: [[A:%.*]] = alloca i8, align 1
|
||||
; CHECK-OPAQUE-NEXT: store i8 0, ptr [[A]], align 1
|
||||
; CHECK-OPAQUE-NEXT: call void @byte_user_of_alloca(ptr [[A]])
|
||||
; CHECK-OPAQUE-NEXT: ret i8 0
|
||||
; CHECK-OPAQUE-NEXT: [[R:%.*]] = load i8, ptr [[A]], align 1
|
||||
; CHECK-OPAQUE-NEXT: ret i8 [[R]]
|
||||
;
|
||||
entry:
|
||||
%a = alloca i8
|
||||
|
|
|
|||
Loading…
Reference in New Issue