maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

MC: Only allow changing feature bits in MCSubtargetInfo 

Disallow all mutation of `MCSubtargetInfo` expect the feature bits.

Besides deleting the assignment operators -- which were dead "code" --
this restricts `InitMCProcessorInfo()` to subclass initialization
sequences, and exposes a new more limited function called
`setDefaultFeatures()` for use by the ARMAsmParser `.cpu` directive.

There's a small functional change here: ARMAsmParser used to adjust
`MCSubtargetInfo::CPUSchedModel` as a side effect of calling
`InitMCProcessorInfo()`, but I've removed that suspicious behaviour.
Since the AsmParser shouldn't be doing any scheduling, there shouldn't
be any observable change...

llvm-svn: 241961
This commit is contained in:
Duncan P. N. Exon Smith 2015-07-10 22:52:15 +00:00
parent cf13d18730
commit e463e470f8
3 changed files with 25 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
llvm/include/llvm/MC/MCSubtargetInfo.h
View File

@ -45,8 +45,11 @@ class MCSubtargetInfo {
FeatureBitset FeatureBits; // Feature bits for current CPU + FS
MCSubtargetInfo() = delete;
MCSubtargetInfo &operator=(MCSubtargetInfo &&) = delete;
MCSubtargetInfo &operator=(const MCSubtargetInfo &) = delete;
public:
MCSubtargetInfo(const MCSubtargetInfo &) = default;
MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS,
ArrayRef<SubtargetFeatureKV> PF,
ArrayRef<SubtargetFeatureKV> PD,
@ -75,10 +78,17 @@ public:
FeatureBits = FeatureBits_;
}
/// InitMCProcessorInfo - Set or change the CPU (optionally supplemented with
/// feature string). Recompute feature bits and scheduling model.
protected:
/// Initialize the scheduling model and feature bits.
///
/// FIXME: Find a way to stick this in the constructor, since it should only
/// be called during initialization.
void InitMCProcessorInfo(StringRef CPU, StringRef FS);
public:
/// Set the features to the default for the given CPU.
void setDefaultFeatures(StringRef CPU);
/// ToggleFeature - Toggle a feature and returns the re-computed feature
/// bits. This version does not change the implied bits.
FeatureBitset ToggleFeature(uint64_t FB);

17
llvm/lib/MC/MCSubtargetInfo.cpp
View File

@ -17,18 +17,25 @@
using namespace llvm;
/// InitMCProcessorInfo - Set or change the CPU (optionally supplemented
/// with feature string). Recompute feature bits and scheduling model.
void
MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) {
static FeatureBitset getFeatures(StringRef CPU, StringRef FS,
ArrayRef<SubtargetFeatureKV> ProcDesc,
ArrayRef<SubtargetFeatureKV> ProcFeatures) {
SubtargetFeatures Features(FS);
FeatureBits = Features.getFeatureBits(CPU, ProcDesc, ProcFeatures);
return Features.getFeatureBits(CPU, ProcDesc, ProcFeatures);
}
void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) {
FeatureBits = getFeatures(CPU, FS, ProcDesc, ProcFeatures);
if (!CPU.empty())
CPUSchedModel = &getSchedModelForCPU(CPU);
else
CPUSchedModel = &MCSchedModel::GetDefaultSchedModel();
}
void MCSubtargetInfo::setDefaultFeatures(StringRef CPU) {
FeatureBits = getFeatures(CPU, "", ProcDesc, ProcFeatures);
}
MCSubtargetInfo::MCSubtargetInfo(
const Triple &TT, StringRef C, StringRef FS,
ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetFeatureKV> PD,

2
llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -9212,7 +9212,7 @@ bool ARMAsmParser::parseDirectiveCPU(SMLoc L) {
return false;
}
STI.InitMCProcessorInfo(CPU, "");
STI.setDefaultFeatures(CPU);
setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
return false;