forked from OSchip/llvm-project
[ARM] VPT validForTailPredication
Mark all VPT instructions as valid. Differential Revision: https://reviews.llvm.org/D87759
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@ -6453,6 +6453,7 @@ class MVE_VPT<string suffix, bits<2> size, dag iops, string asm, list<dag> patte
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let Inst{4} = 0b0;
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let Defs = [VPR];
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let validForTailPredication=1;
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}
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class MVE_VPTt1<string suffix, bits<2> size, dag iops>
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@ -6565,6 +6566,7 @@ class MVE_VPTf<string suffix, bit size, dag iops, string asm, list<dag> pattern=
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let Defs = [VPR];
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let Predicates = [HasMVEFloat];
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let validForTailPredication=1;
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}
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class MVE_VPTft1<string suffix, bit size>
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@ -747,6 +747,28 @@ TEST(MachineInstrValidTailPredication, IsCorrect) {
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case MVE_VORRimmi16:
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case MVE_VORRimmi32:
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case MVE_VPST:
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case MVE_VPTv16i8:
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case MVE_VPTv8i16:
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case MVE_VPTv4i32:
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case MVE_VPTv16i8r:
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case MVE_VPTv8i16r:
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case MVE_VPTv4i32r:
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case MVE_VPTv16s8:
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case MVE_VPTv8s16:
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case MVE_VPTv4s32:
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case MVE_VPTv16s8r:
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case MVE_VPTv8s16r:
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case MVE_VPTv4s32r:
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case MVE_VPTv16u8:
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case MVE_VPTv8u16:
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case MVE_VPTv4u32:
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case MVE_VPTv16u8r:
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case MVE_VPTv8u16r:
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case MVE_VPTv4u32r:
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case MVE_VPTv8f16:
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case MVE_VPTv4f32:
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case MVE_VPTv8f16r:
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case MVE_VPTv4f32r:
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case MVE_VQABSs16:
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case MVE_VQABSs32:
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case MVE_VQABSs8:
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