forked from OSchip/llvm-project
Add Rest of Targets Support to ValidCPUList (enabling march notes)
A followup to: https://reviews.llvm.org/D42978 Most of the rest of the Targets were pretty rote, so this patch knocks them all out at once. Differential Revision: https://reviews.llvm.org/D43057 llvm-svn: 324676
This commit is contained in:
Erich Keane
parent
d45879d8ad
commit
e44bdb3f70
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@ -228,72 +228,37 @@ void AMDGPUTargetInfo::adjustTargetOptions(const CodeGenOptions &CGOpts,
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TargetOpts.Features.push_back("+fp64-fp16-denormals");
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}
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constexpr AMDGPUTargetInfo::NameGPUKind AMDGPUTargetInfo::R600Names[];
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constexpr AMDGPUTargetInfo::NameGPUKind AMDGPUTargetInfo::AMDGCNNames[];
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AMDGPUTargetInfo::GPUKind AMDGPUTargetInfo::parseR600Name(StringRef Name) {
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return llvm::StringSwitch<GPUKind>(Name)
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.Case("r600", GK_R600)
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.Case("rv610", GK_R600)
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.Case("rv620", GK_R600)
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.Case("rv630", GK_R600)
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.Case("rv635", GK_R600)
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.Case("rs780", GK_R600)
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.Case("rs880", GK_R600)
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.Case("rv670", GK_R600_DOUBLE_OPS)
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.Case("rv710", GK_R700)
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.Case("rv730", GK_R700)
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.Case("rv740", GK_R700_DOUBLE_OPS)
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.Case("rv770", GK_R700_DOUBLE_OPS)
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.Case("palm", GK_EVERGREEN)
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.Case("cedar", GK_EVERGREEN)
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.Case("sumo", GK_EVERGREEN)
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.Case("sumo2", GK_EVERGREEN)
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.Case("redwood", GK_EVERGREEN)
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.Case("juniper", GK_EVERGREEN)
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.Case("hemlock", GK_EVERGREEN_DOUBLE_OPS)
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.Case("cypress", GK_EVERGREEN_DOUBLE_OPS)
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.Case("barts", GK_NORTHERN_ISLANDS)
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.Case("turks", GK_NORTHERN_ISLANDS)
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.Case("caicos", GK_NORTHERN_ISLANDS)
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.Case("cayman", GK_CAYMAN)
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.Case("aruba", GK_CAYMAN)
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.Default(GK_NONE);
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const auto *Result = llvm::find_if(
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R600Names, [Name](const NameGPUKind &Kind) { return Kind.Name == Name; });
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if (Result == std::end(R600Names))
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return GK_NONE;
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return Result->Kind;
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}
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AMDGPUTargetInfo::GPUKind AMDGPUTargetInfo::parseAMDGCNName(StringRef Name) {
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return llvm::StringSwitch<GPUKind>(Name)
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.Case("gfx600", GK_GFX6)
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.Case("tahiti", GK_GFX6)
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.Case("gfx601", GK_GFX6)
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.Case("pitcairn", GK_GFX6)
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.Case("verde", GK_GFX6)
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.Case("oland", GK_GFX6)
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.Case("hainan", GK_GFX6)
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.Case("gfx700", GK_GFX7)
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.Case("bonaire", GK_GFX7)
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.Case("kaveri", GK_GFX7)
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.Case("gfx701", GK_GFX7)
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.Case("hawaii", GK_GFX7)
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.Case("gfx702", GK_GFX7)
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.Case("gfx703", GK_GFX7)
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.Case("kabini", GK_GFX7)
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.Case("mullins", GK_GFX7)
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.Case("gfx800", GK_GFX8)
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.Case("iceland", GK_GFX8)
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.Case("gfx801", GK_GFX8)
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.Case("carrizo", GK_GFX8)
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.Case("gfx802", GK_GFX8)
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.Case("tonga", GK_GFX8)
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.Case("gfx803", GK_GFX8)
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.Case("fiji", GK_GFX8)
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.Case("polaris10", GK_GFX8)
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.Case("polaris11", GK_GFX8)
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.Case("gfx804", GK_GFX8)
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.Case("gfx810", GK_GFX8)
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.Case("stoney", GK_GFX8)
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.Case("gfx900", GK_GFX9)
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.Case("gfx901", GK_GFX9)
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.Case("gfx902", GK_GFX9)
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.Case("gfx903", GK_GFX9)
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.Default(GK_NONE);
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const auto *Result =
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llvm::find_if(AMDGCNNames, [Name](const NameGPUKind &Kind) {
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return Kind.Name == Name;
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});
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if (Result == std::end(AMDGCNNames))
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return GK_NONE;
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return Result->Kind;
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}
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void AMDGPUTargetInfo::fillValidCPUList(
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SmallVectorImpl<StringRef> &Values) const {
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if (getTriple().getArch() == llvm::Triple::amdgcn)
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llvm::for_each(AMDGCNNames, [&Values](const NameGPUKind &Kind) {
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Values.emplace_back(Kind.Name);});
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else
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llvm::for_each(R600Names, [&Values](const NameGPUKind &Kind) {
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Values.emplace_back(Kind.Name);});
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}
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void AMDGPUTargetInfo::setAddressSpaceMap(bool DefaultIsPrivate) {
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@ -64,6 +64,58 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
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GK_GFX9
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} GPU;
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struct NameGPUKind {
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llvm::StringLiteral Name;
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AMDGPUTargetInfo::GPUKind Kind;
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};
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static constexpr NameGPUKind R600Names[] = {
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{{"r600"}, GK_R600},
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{{"rv610"}, GK_R600},
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{{"rv620"}, GK_R600},
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{{"rv630"}, GK_R600},
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{{"rv635"}, GK_R600},
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{{"rs780"}, GK_R600},
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{{"rs880"}, GK_R600},
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{{"rv670"}, GK_R600_DOUBLE_OPS},
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{{"rv710"}, GK_R700},
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{{"rv730"}, GK_R700},
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{{"rv740"}, GK_R700_DOUBLE_OPS},
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{{"rv770"}, GK_R700_DOUBLE_OPS},
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{{"palm"}, GK_EVERGREEN},
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{{"cedar"}, GK_EVERGREEN},
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{{"sumo"}, GK_EVERGREEN},
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{{"sumo2"}, GK_EVERGREEN},
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{{"redwood"}, GK_EVERGREEN},
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{{"juniper"}, GK_EVERGREEN},
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{{"hemlock"}, GK_EVERGREEN_DOUBLE_OPS},
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{{"cypress"}, GK_EVERGREEN_DOUBLE_OPS},
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{{"barts"}, GK_NORTHERN_ISLANDS},
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{{"turks"}, GK_NORTHERN_ISLANDS},
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{{"caicos"}, GK_NORTHERN_ISLANDS},
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{{"cayman"}, GK_CAYMAN},
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{{"aruba"}, GK_CAYMAN},
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};
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static constexpr NameGPUKind AMDGCNNames[] = {
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{{"gfx600"}, GK_GFX6}, {{"tahiti"}, GK_GFX6},
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{{"gfx601"}, GK_GFX6}, {{"pitcairn"}, GK_GFX6},
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{{"verde"}, GK_GFX6}, {{"oland"}, GK_GFX6},
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{{"hainan"}, GK_GFX6}, {{"gfx700"}, GK_GFX7},
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{{"bonaire"}, GK_GFX7}, {{"kaveri"}, GK_GFX7},
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{{"gfx701"}, GK_GFX7}, {{"hawaii"}, GK_GFX7},
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{{"gfx702"}, GK_GFX7}, {{"gfx703"}, GK_GFX7},
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{{"kabini"}, GK_GFX7}, {{"mullins"}, GK_GFX7},
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{{"gfx800"}, GK_GFX8}, {{"iceland"}, GK_GFX8},
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{{"gfx801"}, GK_GFX8}, {{"carrizo"}, GK_GFX8},
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{{"gfx802"}, GK_GFX8}, {{"tonga"}, GK_GFX8},
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{{"gfx803"}, GK_GFX8}, {{"fiji"}, GK_GFX8},
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{{"polaris10"}, GK_GFX8}, {{"polaris11"}, GK_GFX8},
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{{"gfx804"}, GK_GFX8}, {{"gfx810"}, GK_GFX8},
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{{"stoney"}, GK_GFX8}, {{"gfx900"}, GK_GFX9},
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{{"gfx901"}, GK_GFX9}, {{"gfx902"}, GK_GFX9},
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{{"gfx903"}, GK_GFX9},
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};
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bool hasFP64 : 1;
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bool hasFMAF : 1;
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bool hasLDEXPF : 1;
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@ -219,6 +271,8 @@ public:
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return GK_NONE != parseR600Name(Name);
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}
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void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
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bool setCPU(const std::string &Name) override {
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if (getTriple().getArch() == llvm::Triple::amdgcn)
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GPU = parseAMDGCNName(Name);
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@ -28,7 +28,7 @@ struct LLVM_LIBRARY_VISIBILITY MCUInfo {
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};
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// This list should be kept up-to-date with AVRDevices.td in LLVM.
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static ArrayRef<MCUInfo> AVRMcus = {
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static MCUInfo AVRMcus[] = {
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{"at90s1200", "__AVR_AT90S1200__"},
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{"attiny11", "__AVR_ATtiny11__"},
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{"attiny12", "__AVR_ATtiny12__"},
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@ -273,35 +273,29 @@ static ArrayRef<MCUInfo> AVRMcus = {
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} // namespace targets
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} // namespace clang
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static constexpr llvm::StringLiteral ValidFamilyNames[] = {
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"avr1", "avr2", "avr25", "avr3", "avr31",
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"avr35", "avr4", "avr5", "avr51", "avr6",
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"avrxmega1", "avrxmega2", "avrxmega3", "avrxmega4", "avrxmega5",
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"avrxmega6", "avrxmega7", "avrtiny"};
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bool AVRTargetInfo::isValidCPUName(StringRef Name) const {
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bool IsFamily = llvm::StringSwitch<bool>(Name)
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.Case("avr1", true)
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.Case("avr2", true)
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.Case("avr25", true)
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.Case("avr3", true)
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.Case("avr31", true)
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.Case("avr35", true)
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.Case("avr4", true)
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.Case("avr5", true)
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.Case("avr51", true)
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.Case("avr6", true)
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.Case("avrxmega1", true)
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.Case("avrxmega2", true)
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.Case("avrxmega3", true)
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.Case("avrxmega4", true)
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.Case("avrxmega5", true)
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.Case("avrxmega6", true)
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.Case("avrxmega7", true)
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.Case("avrtiny", true)
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.Default(false);
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bool IsFamily =
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llvm::find(ValidFamilyNames, Name) != std::end(ValidFamilyNames);
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bool IsMCU =
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std::find_if(AVRMcus.begin(), AVRMcus.end(), [&](const MCUInfo &Info) {
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llvm::find_if(AVRMcus, [&](const MCUInfo &Info) {
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return Info.Name == Name;
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}) != AVRMcus.end();
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}) != std::end(AVRMcus);
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return IsFamily || IsMCU;
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}
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void AVRTargetInfo::fillValidCPUList(SmallVectorImpl<StringRef> &Values) const {
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Values.append(std::begin(ValidFamilyNames), std::end(ValidFamilyNames));
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for (const MCUInfo &Info : AVRMcus)
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Values.push_back(Info.Name);
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}
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void AVRTargetInfo::getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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Builder.defineMacro("AVR");
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@ -309,12 +303,10 @@ void AVRTargetInfo::getTargetDefines(const LangOptions &Opts,
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Builder.defineMacro("__AVR__");
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if (!this->CPU.empty()) {
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auto It =
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std::find_if(AVRMcus.begin(), AVRMcus.end(), [&](const MCUInfo &Info) {
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return Info.Name == this->CPU;
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});
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auto It = llvm::find_if(
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AVRMcus, [&](const MCUInfo &Info) { return Info.Name == this->CPU; });
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if (It != AVRMcus.end())
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if (It != std::end(AVRMcus))
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Builder.defineMacro(It->DefineName);
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}
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}
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@ -167,6 +167,7 @@ public:
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}
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bool isValidCPUName(StringRef Name) const override;
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void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
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bool setCPU(const std::string &Name) override {
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bool isValid = isValidCPUName(Name);
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if (isValid)
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@ -14,6 +14,7 @@
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#include "BPF.h"
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#include "Targets.h"
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#include "clang/Basic/MacroBuilder.h"
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#include "llvm/ADT/StringRef.h"
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using namespace clang;
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using namespace clang::targets;
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@ -23,3 +24,14 @@ void BPFTargetInfo::getTargetDefines(const LangOptions &Opts,
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DefineStd(Builder, "bpf", Opts);
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Builder.defineMacro("__BPF__");
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}
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static constexpr llvm::StringLiteral ValidCPUNames[] = {"generic", "v1", "v2",
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"probe"};
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bool BPFTargetInfo::isValidCPUName(StringRef Name) const {
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return llvm::find(ValidCPUNames, Name) != std::end(ValidCPUNames);
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}
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void BPFTargetInfo::fillValidCPUList(SmallVectorImpl<StringRef> &Values) const {
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Values.append(std::begin(ValidCPUNames), std::end(ValidCPUNames));
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}
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@ -77,12 +77,9 @@ public:
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}
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}
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bool isValidCPUName(StringRef Name) const override {
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if (Name == "generic" || Name == "v1" ||
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Name == "v2" || Name == "probe")
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return true;
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return false;
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}
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bool isValidCPUName(StringRef Name) const override;
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void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
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bool setCPU(const std::string &Name) override {
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StringRef CPUName(Name);
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@ -141,15 +141,29 @@ bool HexagonTargetInfo::hasFeature(StringRef Feature) const {
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.Default(false);
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}
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struct CPUSuffix {
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llvm::StringLiteral Name;
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llvm::StringLiteral Suffix;
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};
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static constexpr CPUSuffix Suffixes[] = {
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{{"hexagonv4"}, {"4"}}, {{"hexagonv5"}, {"5"}},
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{{"hexagonv55"}, {"55"}}, {{"hexagonv60"}, {"60"}},
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{{"hexagonv62"}, {"62"}}, {{"hexagonv65"}, {"65"}},
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};
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const char *HexagonTargetInfo::getHexagonCPUSuffix(StringRef Name) {
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return llvm::StringSwitch<const char *>(Name)
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.Case("hexagonv4", "4")
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.Case("hexagonv5", "5")
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.Case("hexagonv55", "55")
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.Case("hexagonv60", "60")
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.Case("hexagonv62", "62")
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.Case("hexagonv65", "65")
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.Default(nullptr);
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const CPUSuffix *Item = llvm::find_if(
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Suffixes, [Name](const CPUSuffix &S) { return S.Name == Name; });
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if (Item == std::end(Suffixes))
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return nullptr;
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return Item->Suffix.data();
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}
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void HexagonTargetInfo::fillValidCPUList(
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SmallVectorImpl<StringRef> &Values) const {
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for (const CPUSuffix &Suffix : Suffixes)
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Values.push_back(Suffix.Name);
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}
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ArrayRef<Builtin::Info> HexagonTargetInfo::getTargetBuiltins() const {
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@ -112,6 +112,8 @@ public:
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return getHexagonCPUSuffix(Name);
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}
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void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
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bool setCPU(const std::string &Name) override {
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if (!isValidCPUName(Name))
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return false;
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@ -40,6 +40,10 @@ ArrayRef<TargetInfo::GCCRegAlias> LanaiTargetInfo::getGCCRegAliases() const {
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bool LanaiTargetInfo::isValidCPUName(StringRef Name) const {
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return llvm::StringSwitch<bool>(Name).Case("v11", true).Default(false);
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}
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void LanaiTargetInfo::fillValidCPUList(
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SmallVectorImpl<StringRef> &Values) const {
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Values.emplace_back("v11");
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}
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bool LanaiTargetInfo::setCPU(const std::string &Name) {
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CPU = llvm::StringSwitch<CPUKind>(Name).Case("v11", CK_V11).Default(CK_NONE);
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@ -65,6 +65,8 @@ public:
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bool isValidCPUName(StringRef Name) const override;
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void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
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bool setCPU(const std::string &Name) override;
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bool hasFeature(StringRef Feature) const override;
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@ -44,26 +44,19 @@ bool MipsTargetInfo::processorSupportsGPR64() const {
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return false;
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}
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static constexpr llvm::StringLiteral ValidCPUNames[] = {
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{"mips1"}, {"mips2"}, {"mips3"}, {"mips4"}, {"mips5"},
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{"mips32"}, {"mips32r2"}, {"mips32r3"}, {"mips32r5"}, {"mips32r6"},
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{"mips64"}, {"mips64r2"}, {"mips64r3"}, {"mips64r5"}, {"mips64r6"},
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{"octeon"}, {"p5600"}};
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bool MipsTargetInfo::isValidCPUName(StringRef Name) const {
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return llvm::StringSwitch<bool>(Name)
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.Case("mips1", true)
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.Case("mips2", true)
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.Case("mips3", true)
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.Case("mips4", true)
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.Case("mips5", true)
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.Case("mips32", true)
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.Case("mips32r2", true)
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.Case("mips32r3", true)
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.Case("mips32r5", true)
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.Case("mips32r6", true)
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.Case("mips64", true)
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.Case("mips64r2", true)
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.Case("mips64r3", true)
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.Case("mips64r5", true)
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.Case("mips64r6", true)
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.Case("octeon", true)
|
||||
.Case("p5600", true)
|
||||
.Default(false);
|
||||
return llvm::find(ValidCPUNames, Name) != std::end(ValidCPUNames);
|
||||
}
|
||||
|
||||
void MipsTargetInfo::fillValidCPUList(
|
||||
SmallVectorImpl<StringRef> &Values) const {
|
||||
Values.append(std::begin(ValidCPUNames), std::end(ValidCPUNames));
|
||||
}
|
||||
|
||||
void MipsTargetInfo::getTargetDefines(const LangOptions &Opts,
|
||||
|
|
|
|||
|
|
@ -161,6 +161,7 @@ public:
|
|||
}
|
||||
|
||||
bool isValidCPUName(StringRef Name) const override;
|
||||
void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
|
||||
|
||||
bool setCPU(const std::string &Name) override {
|
||||
CPU = Name;
|
||||
|
|
|
|||
|
|
@ -56,6 +56,10 @@ public:
|
|||
return Name == "nios2r1" || Name == "nios2r2";
|
||||
}
|
||||
|
||||
void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override {
|
||||
Values.append({"nios2r1", "nios2r2"});
|
||||
}
|
||||
|
||||
bool setCPU(const std::string &Name) override {
|
||||
if (isValidCPUName(Name)) {
|
||||
CPU = Name;
|
||||
|
|
|
|||
|
|
@ -479,57 +479,26 @@ ArrayRef<TargetInfo::GCCRegAlias> PPCTargetInfo::getGCCRegAliases() const {
|
|||
return llvm::makeArrayRef(GCCRegAliases);
|
||||
}
|
||||
|
||||
static constexpr llvm::StringLiteral ValidCPUNames[] = {
|
||||
{"generic"}, {"440"}, {"450"}, {"601"}, {"602"},
|
||||
{"603"}, {"603e"}, {"603ev"}, {"604"}, {"604e"},
|
||||
{"620"}, {"630"}, {"g3"}, {"7400"}, {"g4"},
|
||||
{"7450"}, {"g4+"}, {"750"}, {"970"}, {"g5"},
|
||||
{"a2"}, {"a2q"}, {"e500mc"}, {"e5500"}, {"power3"},
|
||||
{"pwr3"}, {"power4"}, {"pwr4"}, {"power5"}, {"pwr5"},
|
||||
{"power5x"}, {"pwr5x"}, {"power6"}, {"pwr6"}, {"power6x"},
|
||||
{"pwr6x"}, {"power7"}, {"pwr7"}, {"power8"}, {"pwr8"},
|
||||
{"power9"}, {"pwr9"}, {"powerpc"}, {"ppc"}, {"powerpc64"},
|
||||
{"ppc64"}, {"powerpc64le"}, {"ppc64le"},
|
||||
};
|
||||
|
||||
bool PPCTargetInfo::isValidCPUName(StringRef Name) const {
|
||||
return llvm::StringSwitch<bool>(Name)
|
||||
.Case("generic", true)
|
||||
.Case("440", true)
|
||||
.Case("450", true)
|
||||
.Case("601", true)
|
||||
.Case("602", true)
|
||||
.Case("603", true)
|
||||
.Case("603e", true)
|
||||
.Case("603ev", true)
|
||||
.Case("604", true)
|
||||
.Case("604e", true)
|
||||
.Case("620", true)
|
||||
.Case("630", true)
|
||||
.Case("g3", true)
|
||||
.Case("7400", true)
|
||||
.Case("g4", true)
|
||||
.Case("7450", true)
|
||||
.Case("g4+", true)
|
||||
.Case("750", true)
|
||||
.Case("970", true)
|
||||
.Case("g5", true)
|
||||
.Case("a2", true)
|
||||
.Case("a2q", true)
|
||||
.Case("e500mc", true)
|
||||
.Case("e5500", true)
|
||||
.Case("power3", true)
|
||||
.Case("pwr3", true)
|
||||
.Case("power4", true)
|
||||
.Case("pwr4", true)
|
||||
.Case("power5", true)
|
||||
.Case("pwr5", true)
|
||||
.Case("power5x", true)
|
||||
.Case("pwr5x", true)
|
||||
.Case("power6", true)
|
||||
.Case("pwr6", true)
|
||||
.Case("power6x", true)
|
||||
.Case("pwr6x", true)
|
||||
.Case("power7", true)
|
||||
.Case("pwr7", true)
|
||||
.Case("power8", true)
|
||||
.Case("pwr8", true)
|
||||
.Case("power9", true)
|
||||
.Case("pwr9", true)
|
||||
.Case("powerpc", true)
|
||||
.Case("ppc", true)
|
||||
.Case("powerpc64", true)
|
||||
.Case("ppc64", true)
|
||||
.Case("powerpc64le", true)
|
||||
.Case("ppc64le", true)
|
||||
.Default(false);
|
||||
const StringRef *FoundName = llvm::find(ValidCPUNames, Name);
|
||||
return FoundName != std::end(ValidCPUNames);
|
||||
}
|
||||
|
||||
void PPCTargetInfo::fillValidCPUList(SmallVectorImpl<StringRef> &Values) const {
|
||||
Values.append(std::begin(ValidCPUNames), std::end(ValidCPUNames));
|
||||
}
|
||||
|
||||
void PPCTargetInfo::adjust(LangOptions &Opts) {
|
||||
|
|
|
|||
|
|
@ -86,6 +86,7 @@ public:
|
|||
// 821, 823, 8540, 8548, e300c2, e300c3, e500mc64, e6500, 860, cell,
|
||||
// titan, rs64.
|
||||
bool isValidCPUName(StringRef Name) const override;
|
||||
void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
|
||||
|
||||
bool setCPU(const std::string &Name) override {
|
||||
bool CPUKnown = isValidCPUName(Name);
|
||||
|
|
|
|||
|
|
@ -51,49 +51,81 @@ bool SparcTargetInfo::hasFeature(StringRef Feature) const {
|
|||
.Default(false);
|
||||
}
|
||||
|
||||
struct SparcCPUInfo {
|
||||
llvm::StringLiteral Name;
|
||||
SparcTargetInfo::CPUKind Kind;
|
||||
SparcTargetInfo::CPUGeneration Generation;
|
||||
};
|
||||
|
||||
static constexpr SparcCPUInfo CPUInfo[] = {
|
||||
{{"v8"}, SparcTargetInfo::CK_V8, SparcTargetInfo::CG_V8},
|
||||
{{"supersparc"}, SparcTargetInfo::CK_SUPERSPARC, SparcTargetInfo::CG_V8},
|
||||
{{"sparclite"}, SparcTargetInfo::CK_SPARCLITE, SparcTargetInfo::CG_V8},
|
||||
{{"f934"}, SparcTargetInfo::CK_F934, SparcTargetInfo::CG_V8},
|
||||
{{"hypersparc"}, SparcTargetInfo::CK_HYPERSPARC, SparcTargetInfo::CG_V8},
|
||||
{{"sparclite86x"},
|
||||
SparcTargetInfo::CK_SPARCLITE86X,
|
||||
SparcTargetInfo::CG_V8},
|
||||
{{"sparclet"}, SparcTargetInfo::CK_SPARCLET, SparcTargetInfo::CG_V8},
|
||||
{{"tsc701"}, SparcTargetInfo::CK_TSC701, SparcTargetInfo::CG_V8},
|
||||
{{"v9"}, SparcTargetInfo::CK_V9, SparcTargetInfo::CG_V9},
|
||||
{{"ultrasparc"}, SparcTargetInfo::CK_ULTRASPARC, SparcTargetInfo::CG_V9},
|
||||
{{"ultrasparc3"}, SparcTargetInfo::CK_ULTRASPARC3, SparcTargetInfo::CG_V9},
|
||||
{{"niagara"}, SparcTargetInfo::CK_NIAGARA, SparcTargetInfo::CG_V9},
|
||||
{{"niagara2"}, SparcTargetInfo::CK_NIAGARA2, SparcTargetInfo::CG_V9},
|
||||
{{"niagara3"}, SparcTargetInfo::CK_NIAGARA3, SparcTargetInfo::CG_V9},
|
||||
{{"niagara4"}, SparcTargetInfo::CK_NIAGARA4, SparcTargetInfo::CG_V9},
|
||||
{{"ma2100"}, SparcTargetInfo::CK_MYRIAD2100, SparcTargetInfo::CG_V8},
|
||||
{{"ma2150"}, SparcTargetInfo::CK_MYRIAD2150, SparcTargetInfo::CG_V8},
|
||||
{{"ma2155"}, SparcTargetInfo::CK_MYRIAD2155, SparcTargetInfo::CG_V8},
|
||||
{{"ma2450"}, SparcTargetInfo::CK_MYRIAD2450, SparcTargetInfo::CG_V8},
|
||||
{{"ma2455"}, SparcTargetInfo::CK_MYRIAD2455, SparcTargetInfo::CG_V8},
|
||||
{{"ma2x5x"}, SparcTargetInfo::CK_MYRIAD2x5x, SparcTargetInfo::CG_V8},
|
||||
{{"ma2080"}, SparcTargetInfo::CK_MYRIAD2080, SparcTargetInfo::CG_V8},
|
||||
{{"ma2085"}, SparcTargetInfo::CK_MYRIAD2085, SparcTargetInfo::CG_V8},
|
||||
{{"ma2480"}, SparcTargetInfo::CK_MYRIAD2480, SparcTargetInfo::CG_V8},
|
||||
{{"ma2485"}, SparcTargetInfo::CK_MYRIAD2485, SparcTargetInfo::CG_V8},
|
||||
{{"ma2x8x"}, SparcTargetInfo::CK_MYRIAD2x8x, SparcTargetInfo::CG_V8},
|
||||
// FIXME: the myriad2[.n] spellings are obsolete,
|
||||
// but a grace period is needed to allow updating dependent builds.
|
||||
{{"myriad2"}, SparcTargetInfo::CK_MYRIAD2x5x, SparcTargetInfo::CG_V8},
|
||||
{{"myriad2.1"}, SparcTargetInfo::CK_MYRIAD2100, SparcTargetInfo::CG_V8},
|
||||
{{"myriad2.2"}, SparcTargetInfo::CK_MYRIAD2x5x, SparcTargetInfo::CG_V8},
|
||||
{{"myriad2.3"}, SparcTargetInfo::CK_MYRIAD2x8x, SparcTargetInfo::CG_V8},
|
||||
{{"leon2"}, SparcTargetInfo::CK_LEON2, SparcTargetInfo::CG_V8},
|
||||
{{"at697e"}, SparcTargetInfo::CK_LEON2_AT697E, SparcTargetInfo::CG_V8},
|
||||
{{"at697f"}, SparcTargetInfo::CK_LEON2_AT697F, SparcTargetInfo::CG_V8},
|
||||
{{"leon3"}, SparcTargetInfo::CK_LEON3, SparcTargetInfo::CG_V8},
|
||||
{{"ut699"}, SparcTargetInfo::CK_LEON3_UT699, SparcTargetInfo::CG_V8},
|
||||
{{"gr712rc"}, SparcTargetInfo::CK_LEON3_GR712RC, SparcTargetInfo::CG_V8},
|
||||
{{"leon4"}, SparcTargetInfo::CK_LEON4, SparcTargetInfo::CG_V8},
|
||||
{{"gr740"}, SparcTargetInfo::CK_LEON4_GR740, SparcTargetInfo::CG_V8},
|
||||
};
|
||||
|
||||
SparcTargetInfo::CPUGeneration
|
||||
SparcTargetInfo::getCPUGeneration(CPUKind Kind) const {
|
||||
if (Kind == CK_GENERIC)
|
||||
return CG_V8;
|
||||
const SparcCPUInfo *Item = llvm::find_if(
|
||||
CPUInfo, [Kind](const SparcCPUInfo &Info) { return Info.Kind == Kind; });
|
||||
if (Item == std::end(CPUInfo))
|
||||
llvm_unreachable("Unexpected CPU kind");
|
||||
return Item->Generation;
|
||||
}
|
||||
|
||||
SparcTargetInfo::CPUKind SparcTargetInfo::getCPUKind(StringRef Name) const {
|
||||
return llvm::StringSwitch<CPUKind>(Name)
|
||||
.Case("v8", CK_V8)
|
||||
.Case("supersparc", CK_SUPERSPARC)
|
||||
.Case("sparclite", CK_SPARCLITE)
|
||||
.Case("f934", CK_F934)
|
||||
.Case("hypersparc", CK_HYPERSPARC)
|
||||
.Case("sparclite86x", CK_SPARCLITE86X)
|
||||
.Case("sparclet", CK_SPARCLET)
|
||||
.Case("tsc701", CK_TSC701)
|
||||
.Case("v9", CK_V9)
|
||||
.Case("ultrasparc", CK_ULTRASPARC)
|
||||
.Case("ultrasparc3", CK_ULTRASPARC3)
|
||||
.Case("niagara", CK_NIAGARA)
|
||||
.Case("niagara2", CK_NIAGARA2)
|
||||
.Case("niagara3", CK_NIAGARA3)
|
||||
.Case("niagara4", CK_NIAGARA4)
|
||||
.Case("ma2100", CK_MYRIAD2100)
|
||||
.Case("ma2150", CK_MYRIAD2150)
|
||||
.Case("ma2155", CK_MYRIAD2155)
|
||||
.Case("ma2450", CK_MYRIAD2450)
|
||||
.Case("ma2455", CK_MYRIAD2455)
|
||||
.Case("ma2x5x", CK_MYRIAD2x5x)
|
||||
.Case("ma2080", CK_MYRIAD2080)
|
||||
.Case("ma2085", CK_MYRIAD2085)
|
||||
.Case("ma2480", CK_MYRIAD2480)
|
||||
.Case("ma2485", CK_MYRIAD2485)
|
||||
.Case("ma2x8x", CK_MYRIAD2x8x)
|
||||
// FIXME: the myriad2[.n] spellings are obsolete,
|
||||
// but a grace period is needed to allow updating dependent builds.
|
||||
.Case("myriad2", CK_MYRIAD2x5x)
|
||||
.Case("myriad2.1", CK_MYRIAD2100)
|
||||
.Case("myriad2.2", CK_MYRIAD2x5x)
|
||||
.Case("myriad2.3", CK_MYRIAD2x8x)
|
||||
.Case("leon2", CK_LEON2)
|
||||
.Case("at697e", CK_LEON2_AT697E)
|
||||
.Case("at697f", CK_LEON2_AT697F)
|
||||
.Case("leon3", CK_LEON3)
|
||||
.Case("ut699", CK_LEON3_UT699)
|
||||
.Case("gr712rc", CK_LEON3_GR712RC)
|
||||
.Case("leon4", CK_LEON4)
|
||||
.Case("gr740", CK_LEON4_GR740)
|
||||
.Default(CK_GENERIC);
|
||||
const SparcCPUInfo *Item = llvm::find_if(
|
||||
CPUInfo, [Name](const SparcCPUInfo &Info) { return Info.Name == Name; });
|
||||
|
||||
if (Item == std::end(CPUInfo))
|
||||
return CK_GENERIC;
|
||||
return Item->Kind;
|
||||
}
|
||||
|
||||
void SparcTargetInfo::fillValidCPUList(
|
||||
SmallVectorImpl<StringRef> &Values) const {
|
||||
for (const SparcCPUInfo &Info : CPUInfo)
|
||||
Values.push_back(Info.Name);
|
||||
}
|
||||
|
||||
void SparcTargetInfo::getTargetDefines(const LangOptions &Opts,
|
||||
|
|
@ -202,3 +234,10 @@ void SparcV9TargetInfo::getTargetDefines(const LangOptions &Opts,
|
|||
Builder.defineMacro("__sparcv9__");
|
||||
}
|
||||
}
|
||||
|
||||
void SparcV9TargetInfo::fillValidCPUList(
|
||||
SmallVectorImpl<StringRef> &Values) const {
|
||||
for (const SparcCPUInfo &Info : CPUInfo)
|
||||
if (Info.Generation == CG_V9)
|
||||
Values.push_back(Info.Name);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -131,48 +131,7 @@ public:
|
|||
CG_V9,
|
||||
};
|
||||
|
||||
CPUGeneration getCPUGeneration(CPUKind Kind) const {
|
||||
switch (Kind) {
|
||||
case CK_GENERIC:
|
||||
case CK_V8:
|
||||
case CK_SUPERSPARC:
|
||||
case CK_SPARCLITE:
|
||||
case CK_F934:
|
||||
case CK_HYPERSPARC:
|
||||
case CK_SPARCLITE86X:
|
||||
case CK_SPARCLET:
|
||||
case CK_TSC701:
|
||||
case CK_MYRIAD2100:
|
||||
case CK_MYRIAD2150:
|
||||
case CK_MYRIAD2155:
|
||||
case CK_MYRIAD2450:
|
||||
case CK_MYRIAD2455:
|
||||
case CK_MYRIAD2x5x:
|
||||
case CK_MYRIAD2080:
|
||||
case CK_MYRIAD2085:
|
||||
case CK_MYRIAD2480:
|
||||
case CK_MYRIAD2485:
|
||||
case CK_MYRIAD2x8x:
|
||||
case CK_LEON2:
|
||||
case CK_LEON2_AT697E:
|
||||
case CK_LEON2_AT697F:
|
||||
case CK_LEON3:
|
||||
case CK_LEON3_UT699:
|
||||
case CK_LEON3_GR712RC:
|
||||
case CK_LEON4:
|
||||
case CK_LEON4_GR740:
|
||||
return CG_V8;
|
||||
case CK_V9:
|
||||
case CK_ULTRASPARC:
|
||||
case CK_ULTRASPARC3:
|
||||
case CK_NIAGARA:
|
||||
case CK_NIAGARA2:
|
||||
case CK_NIAGARA3:
|
||||
case CK_NIAGARA4:
|
||||
return CG_V9;
|
||||
}
|
||||
llvm_unreachable("Unexpected CPU kind");
|
||||
}
|
||||
CPUGeneration getCPUGeneration(CPUKind Kind) const;
|
||||
|
||||
CPUKind getCPUKind(StringRef Name) const;
|
||||
|
||||
|
|
@ -180,6 +139,8 @@ public:
|
|||
return getCPUKind(Name) != CK_GENERIC;
|
||||
}
|
||||
|
||||
void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
|
||||
|
||||
bool setCPU(const std::string &Name) override {
|
||||
CPU = getCPUKind(Name);
|
||||
return CPU != CK_GENERIC;
|
||||
|
|
@ -259,6 +220,8 @@ public:
|
|||
return getCPUGeneration(SparcTargetInfo::getCPUKind(Name)) == CG_V9;
|
||||
}
|
||||
|
||||
void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
|
||||
|
||||
bool setCPU(const std::string &Name) override {
|
||||
if (!SparcTargetInfo::setCPU(Name))
|
||||
return false;
|
||||
|
|
|
|||
|
|
@ -83,14 +83,32 @@ bool SystemZTargetInfo::validateAsmConstraint(
|
|||
}
|
||||
}
|
||||
|
||||
struct ISANameRevision {
|
||||
llvm::StringLiteral Name;
|
||||
int ISARevisionID;
|
||||
};
|
||||
static constexpr ISANameRevision ISARevisions[] = {
|
||||
{{"arch8"}, 8}, {{"z10"}, 8},
|
||||
{{"arch9"}, 9}, {{"z196"}, 9},
|
||||
{{"arch10"}, 10}, {{"zEC12"}, 10},
|
||||
{{"arch11"}, 11}, {{"z13"}, 11},
|
||||
{{"arch12"}, 12}, {{"z14"}, 12}
|
||||
};
|
||||
|
||||
int SystemZTargetInfo::getISARevision(StringRef Name) const {
|
||||
return llvm::StringSwitch<int>(Name)
|
||||
.Cases("arch8", "z10", 8)
|
||||
.Cases("arch9", "z196", 9)
|
||||
.Cases("arch10", "zEC12", 10)
|
||||
.Cases("arch11", "z13", 11)
|
||||
.Cases("arch12", "z14", 12)
|
||||
.Default(-1);
|
||||
const auto Rev =
|
||||
llvm::find_if(ISARevisions, [Name](const ISANameRevision &CR) {
|
||||
return CR.Name == Name;
|
||||
});
|
||||
if (Rev == std::end(ISARevisions))
|
||||
return -1;
|
||||
return Rev->ISARevisionID;
|
||||
}
|
||||
|
||||
void SystemZTargetInfo::fillValidCPUList(
|
||||
SmallVectorImpl<StringRef> &Values) const {
|
||||
for (const ISANameRevision &Rev : ISARevisions)
|
||||
Values.push_back(Rev.Name);
|
||||
}
|
||||
|
||||
bool SystemZTargetInfo::hasFeature(StringRef Feature) const {
|
||||
|
|
|
|||
|
|
@ -82,6 +82,8 @@ public:
|
|||
return getISARevision(Name) != -1;
|
||||
}
|
||||
|
||||
void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
|
||||
|
||||
bool setCPU(const std::string &Name) override {
|
||||
CPU = Name;
|
||||
ISARevision = getISARevision(CPU);
|
||||
|
|
|
|||
|
|
@ -29,6 +29,9 @@ const Builtin::Info WebAssemblyTargetInfo::BuiltinInfo[] = {
|
|||
#include "clang/Basic/BuiltinsWebAssembly.def"
|
||||
};
|
||||
|
||||
static constexpr llvm::StringLiteral ValidCPUNames[] = {
|
||||
{"mvp"}, {"bleeding-edge"}, {"generic"}};
|
||||
|
||||
bool WebAssemblyTargetInfo::hasFeature(StringRef Feature) const {
|
||||
return llvm::StringSwitch<bool>(Feature)
|
||||
.Case("simd128", SIMDLevel >= SIMD128)
|
||||
|
|
@ -38,11 +41,12 @@ bool WebAssemblyTargetInfo::hasFeature(StringRef Feature) const {
|
|||
}
|
||||
|
||||
bool WebAssemblyTargetInfo::isValidCPUName(StringRef Name) const {
|
||||
return llvm::StringSwitch<bool>(Name)
|
||||
.Case("mvp", true)
|
||||
.Case("bleeding-edge", true)
|
||||
.Case("generic", true)
|
||||
.Default(false);
|
||||
return llvm::find(ValidCPUNames, Name) != std::end(ValidCPUNames);
|
||||
}
|
||||
|
||||
void WebAssemblyTargetInfo::fillValidCPUList(
|
||||
SmallVectorImpl<StringRef> &Values) const {
|
||||
Values.append(std::begin(ValidCPUNames), std::end(ValidCPUNames));
|
||||
}
|
||||
|
||||
void WebAssemblyTargetInfo::getTargetDefines(const LangOptions &Opts,
|
||||
|
|
|
|||
|
|
@ -74,6 +74,7 @@ private:
|
|||
DiagnosticsEngine &Diags) final;
|
||||
|
||||
bool isValidCPUName(StringRef Name) const final;
|
||||
void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const final;
|
||||
|
||||
bool setCPU(const std::string &Name) final { return isValidCPUName(Name); }
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue