forked from OSchip/llvm-project
[X86] Add SSE42 sat-add test coverage
Check SSE42 targets which have PCMPGTQ
This commit is contained in:
Simon Pilgrim
parent
51e09e1d5a
commit
e3f0177deb
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@ -1,6 +1,7 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=ANY,SSE2
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=ANY,SSE41
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=ANY,SSE4,SSE41
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefixes=ANY,SSE4,SSE42
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; There are at least 3 potential patterns corresponding to an unsigned saturated add: min, cmp with sum, cmp with not.
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; Test each of those patterns with i8/i16/i32/i64.
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@ -401,11 +402,11 @@ define <8 x i16> @unsigned_sat_constant_v8i16_using_min(<8 x i16> %x) {
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; SSE2-NEXT: paddw {{.*}}(%rip), %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: unsigned_sat_constant_v8i16_using_min:
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; SSE41: # %bb.0:
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; SSE41-NEXT: pminuw {{.*}}(%rip), %xmm0
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; SSE41-NEXT: paddw {{.*}}(%rip), %xmm0
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; SSE41-NEXT: retq
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; SSE4-LABEL: unsigned_sat_constant_v8i16_using_min:
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; SSE4: # %bb.0:
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; SSE4-NEXT: pminuw {{.*}}(%rip), %xmm0
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; SSE4-NEXT: paddw {{.*}}(%rip), %xmm0
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; SSE4-NEXT: retq
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%c = icmp ult <8 x i16> %x, <i16 -43, i16 -43, i16 -43, i16 -43, i16 -43, i16 -43, i16 -43, i16 -43>
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%s = select <8 x i1> %c, <8 x i16> %x, <8 x i16> <i16 -43, i16 -43, i16 -43, i16 -43, i16 -43, i16 -43, i16 -43, i16 -43>
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%r = add <8 x i16> %s, <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42>
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@ -447,11 +448,11 @@ define <4 x i32> @unsigned_sat_constant_v4i32_using_min(<4 x i32> %x) {
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; SSE2-NEXT: paddd {{.*}}(%rip), %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: unsigned_sat_constant_v4i32_using_min:
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; SSE41: # %bb.0:
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; SSE41-NEXT: pminud {{.*}}(%rip), %xmm0
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; SSE41-NEXT: paddd {{.*}}(%rip), %xmm0
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; SSE41-NEXT: retq
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; SSE4-LABEL: unsigned_sat_constant_v4i32_using_min:
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; SSE4: # %bb.0:
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; SSE4-NEXT: pminud {{.*}}(%rip), %xmm0
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; SSE4-NEXT: paddd {{.*}}(%rip), %xmm0
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; SSE4-NEXT: retq
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%c = icmp ult <4 x i32> %x, <i32 -43, i32 -43, i32 -43, i32 -43>
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%s = select <4 x i1> %c, <4 x i32> %x, <4 x i32> <i32 -43, i32 -43, i32 -43, i32 -43>
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%r = add <4 x i32> %s, <i32 42, i32 42, i32 42, i32 42>
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@ -470,18 +471,18 @@ define <4 x i32> @unsigned_sat_constant_v4i32_using_cmp_sum(<4 x i32> %x) {
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; SSE2-NEXT: por %xmm1, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: unsigned_sat_constant_v4i32_using_cmp_sum:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [42,42,42,42]
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; SSE41-NEXT: paddd %xmm0, %xmm2
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; SSE41-NEXT: movdqa %xmm0, %xmm1
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; SSE41-NEXT: pminud %xmm2, %xmm1
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; SSE41-NEXT: pcmpeqd %xmm0, %xmm1
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; SSE41-NEXT: pcmpeqd %xmm0, %xmm0
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; SSE41-NEXT: pxor %xmm0, %xmm1
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; SSE41-NEXT: por %xmm2, %xmm1
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; SSE41-NEXT: movdqa %xmm1, %xmm0
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; SSE41-NEXT: retq
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; SSE4-LABEL: unsigned_sat_constant_v4i32_using_cmp_sum:
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; SSE4: # %bb.0:
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; SSE4-NEXT: movdqa {{.*#+}} xmm2 = [42,42,42,42]
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; SSE4-NEXT: paddd %xmm0, %xmm2
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; SSE4-NEXT: movdqa %xmm0, %xmm1
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; SSE4-NEXT: pminud %xmm2, %xmm1
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; SSE4-NEXT: pcmpeqd %xmm0, %xmm1
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; SSE4-NEXT: pcmpeqd %xmm0, %xmm0
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; SSE4-NEXT: pxor %xmm0, %xmm1
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; SSE4-NEXT: por %xmm2, %xmm1
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; SSE4-NEXT: movdqa %xmm1, %xmm0
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; SSE4-NEXT: retq
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%a = add <4 x i32> %x, <i32 42, i32 42, i32 42, i32 42>
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%c = icmp ugt <4 x i32> %x, %a
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%r = select <4 x i1> %c, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> %a
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@ -498,15 +499,15 @@ define <4 x i32> @unsigned_sat_constant_v4i32_using_cmp_notval(<4 x i32> %x) {
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; SSE2-NEXT: por %xmm1, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: unsigned_sat_constant_v4i32_using_cmp_notval:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [42,42,42,42]
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; SSE41-NEXT: paddd %xmm0, %xmm1
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; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [4294967254,4294967254,4294967254,4294967254]
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; SSE41-NEXT: pmaxud %xmm0, %xmm2
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; SSE41-NEXT: pcmpeqd %xmm2, %xmm0
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; SSE41-NEXT: por %xmm1, %xmm0
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; SSE41-NEXT: retq
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; SSE4-LABEL: unsigned_sat_constant_v4i32_using_cmp_notval:
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; SSE4: # %bb.0:
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; SSE4-NEXT: movdqa {{.*#+}} xmm1 = [42,42,42,42]
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; SSE4-NEXT: paddd %xmm0, %xmm1
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; SSE4-NEXT: movdqa {{.*#+}} xmm2 = [4294967254,4294967254,4294967254,4294967254]
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; SSE4-NEXT: pmaxud %xmm0, %xmm2
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; SSE4-NEXT: pcmpeqd %xmm2, %xmm0
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; SSE4-NEXT: por %xmm1, %xmm0
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; SSE4-NEXT: retq
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%a = add <4 x i32> %x, <i32 42, i32 42, i32 42, i32 42>
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%c = icmp ugt <4 x i32> %x, <i32 -43, i32 -43, i32 -43, i32 -43>
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%r = select <4 x i1> %c, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> %a
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@ -523,15 +524,15 @@ define <4 x i32> @unsigned_sat_constant_v4i32_using_cmp_notval_nonsplat(<4 x i32
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; SSE2-NEXT: por %xmm1, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: unsigned_sat_constant_v4i32_using_cmp_notval_nonsplat:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [43,44,45,46]
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; SSE41-NEXT: paddd %xmm0, %xmm1
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; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [4294967253,4294967252,4294967251,4294967250]
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; SSE41-NEXT: pmaxud %xmm0, %xmm2
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; SSE41-NEXT: pcmpeqd %xmm2, %xmm0
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; SSE41-NEXT: por %xmm1, %xmm0
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; SSE41-NEXT: retq
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; SSE4-LABEL: unsigned_sat_constant_v4i32_using_cmp_notval_nonsplat:
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; SSE4: # %bb.0:
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; SSE4-NEXT: movdqa {{.*#+}} xmm1 = [43,44,45,46]
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; SSE4-NEXT: paddd %xmm0, %xmm1
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; SSE4-NEXT: movdqa {{.*#+}} xmm2 = [4294967253,4294967252,4294967251,4294967250]
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; SSE4-NEXT: pmaxud %xmm0, %xmm2
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; SSE4-NEXT: pcmpeqd %xmm2, %xmm0
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; SSE4-NEXT: por %xmm1, %xmm0
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; SSE4-NEXT: retq
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%a = add <4 x i32> %x, <i32 43, i32 44, i32 45, i32 46>
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%c = icmp ugt <4 x i32> %x, <i32 -44, i32 -45, i32 -46, i32 -47>
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%r = select <4 x i1> %c, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> %a
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@ -575,6 +576,19 @@ define <2 x i64> @unsigned_sat_constant_v2i64_using_min(<2 x i64> %x) {
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; SSE41-NEXT: paddq {{.*}}(%rip), %xmm2
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; SSE41-NEXT: movdqa %xmm2, %xmm0
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; SSE41-NEXT: retq
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;
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; SSE42-LABEL: unsigned_sat_constant_v2i64_using_min:
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; SSE42: # %bb.0:
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; SSE42-NEXT: movdqa %xmm0, %xmm1
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; SSE42-NEXT: movapd {{.*#+}} xmm2 = [18446744073709551573,18446744073709551573]
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; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]
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; SSE42-NEXT: pxor %xmm0, %xmm3
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; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775765,9223372036854775765]
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; SSE42-NEXT: pcmpgtq %xmm3, %xmm0
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; SSE42-NEXT: blendvpd %xmm0, %xmm1, %xmm2
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; SSE42-NEXT: paddq {{.*}}(%rip), %xmm2
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; SSE42-NEXT: movdqa %xmm2, %xmm0
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; SSE42-NEXT: retq
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%c = icmp ult <2 x i64> %x, <i64 -43, i64 -43>
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%s = select <2 x i1> %c, <2 x i64> %x, <2 x i64> <i64 -43, i64 -43>
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%r = add <2 x i64> %s, <i64 42, i64 42>
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@ -582,23 +596,52 @@ define <2 x i64> @unsigned_sat_constant_v2i64_using_min(<2 x i64> %x) {
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}
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define <2 x i64> @unsigned_sat_constant_v2i64_using_cmp_sum(<2 x i64> %x) {
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; ANY-LABEL: unsigned_sat_constant_v2i64_using_cmp_sum:
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; ANY: # %bb.0:
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; ANY-NEXT: movdqa {{.*#+}} xmm1 = [42,42]
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; ANY-NEXT: paddq %xmm0, %xmm1
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; ANY-NEXT: movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456]
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; ANY-NEXT: pxor %xmm2, %xmm0
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; ANY-NEXT: pxor %xmm1, %xmm2
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; ANY-NEXT: movdqa %xmm0, %xmm3
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; ANY-NEXT: pcmpgtd %xmm2, %xmm3
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; ANY-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
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; ANY-NEXT: pcmpeqd %xmm0, %xmm2
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; ANY-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
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; ANY-NEXT: pand %xmm4, %xmm2
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; ANY-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3]
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; ANY-NEXT: por %xmm1, %xmm0
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; ANY-NEXT: por %xmm2, %xmm0
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; ANY-NEXT: retq
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; SSE2-LABEL: unsigned_sat_constant_v2i64_using_cmp_sum:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [42,42]
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; SSE2-NEXT: paddq %xmm0, %xmm1
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; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456]
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; SSE2-NEXT: pxor %xmm2, %xmm0
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; SSE2-NEXT: pxor %xmm1, %xmm2
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; SSE2-NEXT: movdqa %xmm0, %xmm3
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; SSE2-NEXT: pcmpgtd %xmm2, %xmm3
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; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
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; SSE2-NEXT: pcmpeqd %xmm0, %xmm2
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; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
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; SSE2-NEXT: pand %xmm4, %xmm2
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3]
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; SSE2-NEXT: por %xmm1, %xmm0
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; SSE2-NEXT: por %xmm2, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: unsigned_sat_constant_v2i64_using_cmp_sum:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [42,42]
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; SSE41-NEXT: paddq %xmm0, %xmm1
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; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456]
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; SSE41-NEXT: pxor %xmm2, %xmm0
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; SSE41-NEXT: pxor %xmm1, %xmm2
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; SSE41-NEXT: movdqa %xmm0, %xmm3
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; SSE41-NEXT: pcmpgtd %xmm2, %xmm3
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; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
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; SSE41-NEXT: pcmpeqd %xmm0, %xmm2
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; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
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; SSE41-NEXT: pand %xmm4, %xmm2
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; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3]
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; SSE41-NEXT: por %xmm1, %xmm0
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; SSE41-NEXT: por %xmm2, %xmm0
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; SSE41-NEXT: retq
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;
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; SSE42-LABEL: unsigned_sat_constant_v2i64_using_cmp_sum:
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; SSE42: # %bb.0:
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; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [42,42]
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; SSE42-NEXT: paddq %xmm0, %xmm1
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; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
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; SSE42-NEXT: pxor %xmm2, %xmm0
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; SSE42-NEXT: pxor %xmm1, %xmm2
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; SSE42-NEXT: pcmpgtq %xmm2, %xmm0
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; SSE42-NEXT: por %xmm1, %xmm0
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; SSE42-NEXT: retq
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%a = add <2 x i64> %x, <i64 42, i64 42>
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%c = icmp ugt <2 x i64> %x, %a
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%r = select <2 x i1> %c, <2 x i64> <i64 -1, i64 -1>, <2 x i64> %a
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@ -606,22 +649,48 @@ define <2 x i64> @unsigned_sat_constant_v2i64_using_cmp_sum(<2 x i64> %x) {
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}
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define <2 x i64> @unsigned_sat_constant_v2i64_using_cmp_notval(<2 x i64> %x) {
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; ANY-LABEL: unsigned_sat_constant_v2i64_using_cmp_notval:
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; ANY: # %bb.0:
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; ANY-NEXT: movdqa {{.*#+}} xmm1 = [42,42]
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; ANY-NEXT: paddq %xmm0, %xmm1
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; ANY-NEXT: pxor {{.*}}(%rip), %xmm0
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; ANY-NEXT: movdqa {{.*#+}} xmm2 = [9223372034707292117,9223372034707292117]
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; ANY-NEXT: movdqa %xmm0, %xmm3
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; ANY-NEXT: pcmpgtd %xmm2, %xmm3
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; ANY-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
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; ANY-NEXT: pcmpeqd %xmm2, %xmm0
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; ANY-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; ANY-NEXT: pand %xmm4, %xmm2
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; ANY-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3]
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; ANY-NEXT: por %xmm1, %xmm0
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; ANY-NEXT: por %xmm2, %xmm0
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; ANY-NEXT: retq
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; SSE2-LABEL: unsigned_sat_constant_v2i64_using_cmp_notval:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [42,42]
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; SSE2-NEXT: paddq %xmm0, %xmm1
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; SSE2-NEXT: pxor {{.*}}(%rip), %xmm0
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; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [9223372034707292117,9223372034707292117]
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; SSE2-NEXT: movdqa %xmm0, %xmm3
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; SSE2-NEXT: pcmpgtd %xmm2, %xmm3
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; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
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; SSE2-NEXT: pcmpeqd %xmm2, %xmm0
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; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; SSE2-NEXT: pand %xmm4, %xmm2
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3]
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; SSE2-NEXT: por %xmm1, %xmm0
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; SSE2-NEXT: por %xmm2, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: unsigned_sat_constant_v2i64_using_cmp_notval:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [42,42]
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; SSE41-NEXT: paddq %xmm0, %xmm1
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; SSE41-NEXT: pxor {{.*}}(%rip), %xmm0
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; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [9223372034707292117,9223372034707292117]
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; SSE41-NEXT: movdqa %xmm0, %xmm3
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; SSE41-NEXT: pcmpgtd %xmm2, %xmm3
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; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
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; SSE41-NEXT: pcmpeqd %xmm2, %xmm0
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; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; SSE41-NEXT: pand %xmm4, %xmm2
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; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3]
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; SSE41-NEXT: por %xmm1, %xmm0
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; SSE41-NEXT: por %xmm2, %xmm0
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; SSE41-NEXT: retq
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;
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; SSE42-LABEL: unsigned_sat_constant_v2i64_using_cmp_notval:
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; SSE42: # %bb.0:
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; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [42,42]
|
||||
; SSE42-NEXT: paddq %xmm0, %xmm1
|
||||
; SSE42-NEXT: pxor {{.*}}(%rip), %xmm0
|
||||
; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm0
|
||||
; SSE42-NEXT: por %xmm1, %xmm0
|
||||
; SSE42-NEXT: retq
|
||||
%a = add <2 x i64> %x, <i64 42, i64 42>
|
||||
%c = icmp ugt <2 x i64> %x, <i64 -43, i64 -43>
|
||||
%r = select <2 x i1> %c, <2 x i64> <i64 -1, i64 -1>, <2 x i64> %a
|
||||
|
|
@ -684,13 +753,13 @@ define <8 x i16> @unsigned_sat_variable_v8i16_using_min(<8 x i16> %x, <8 x i16>
|
|||
; SSE2-NEXT: paddw %xmm1, %xmm0
|
||||
; SSE2-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: unsigned_sat_variable_v8i16_using_min:
|
||||
; SSE41: # %bb.0:
|
||||
; SSE41-NEXT: pcmpeqd %xmm2, %xmm2
|
||||
; SSE41-NEXT: pxor %xmm1, %xmm2
|
||||
; SSE41-NEXT: pminuw %xmm2, %xmm0
|
||||
; SSE41-NEXT: paddw %xmm1, %xmm0
|
||||
; SSE41-NEXT: retq
|
||||
; SSE4-LABEL: unsigned_sat_variable_v8i16_using_min:
|
||||
; SSE4: # %bb.0:
|
||||
; SSE4-NEXT: pcmpeqd %xmm2, %xmm2
|
||||
; SSE4-NEXT: pxor %xmm1, %xmm2
|
||||
; SSE4-NEXT: pminuw %xmm2, %xmm0
|
||||
; SSE4-NEXT: paddw %xmm1, %xmm0
|
||||
; SSE4-NEXT: retq
|
||||
%noty = xor <8 x i16> %y, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
|
||||
%c = icmp ult <8 x i16> %x, %noty
|
||||
%s = select <8 x i1> %c, <8 x i16> %x, <8 x i16> %noty
|
||||
|
|
@ -720,17 +789,17 @@ define <8 x i16> @unsigned_sat_variable_v8i16_using_cmp_notval(<8 x i16> %x, <8
|
|||
; SSE2-NEXT: por %xmm2, %xmm0
|
||||
; SSE2-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: unsigned_sat_variable_v8i16_using_cmp_notval:
|
||||
; SSE41: # %bb.0:
|
||||
; SSE41-NEXT: pcmpeqd %xmm2, %xmm2
|
||||
; SSE41-NEXT: movdqa %xmm0, %xmm3
|
||||
; SSE41-NEXT: paddw %xmm1, %xmm3
|
||||
; SSE41-NEXT: pxor %xmm2, %xmm1
|
||||
; SSE41-NEXT: pminuw %xmm0, %xmm1
|
||||
; SSE41-NEXT: pcmpeqw %xmm1, %xmm0
|
||||
; SSE41-NEXT: pxor %xmm2, %xmm0
|
||||
; SSE41-NEXT: por %xmm3, %xmm0
|
||||
; SSE41-NEXT: retq
|
||||
; SSE4-LABEL: unsigned_sat_variable_v8i16_using_cmp_notval:
|
||||
; SSE4: # %bb.0:
|
||||
; SSE4-NEXT: pcmpeqd %xmm2, %xmm2
|
||||
; SSE4-NEXT: movdqa %xmm0, %xmm3
|
||||
; SSE4-NEXT: paddw %xmm1, %xmm3
|
||||
; SSE4-NEXT: pxor %xmm2, %xmm1
|
||||
; SSE4-NEXT: pminuw %xmm0, %xmm1
|
||||
; SSE4-NEXT: pcmpeqw %xmm1, %xmm0
|
||||
; SSE4-NEXT: pxor %xmm2, %xmm0
|
||||
; SSE4-NEXT: por %xmm3, %xmm0
|
||||
; SSE4-NEXT: retq
|
||||
%noty = xor <8 x i16> %y, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
|
||||
%a = add <8 x i16> %x, %y
|
||||
%c = icmp ugt <8 x i16> %x, %noty
|
||||
|
|
@ -755,13 +824,13 @@ define <4 x i32> @unsigned_sat_variable_v4i32_using_min(<4 x i32> %x, <4 x i32>
|
|||
; SSE2-NEXT: paddd %xmm1, %xmm0
|
||||
; SSE2-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: unsigned_sat_variable_v4i32_using_min:
|
||||
; SSE41: # %bb.0:
|
||||
; SSE41-NEXT: pcmpeqd %xmm2, %xmm2
|
||||
; SSE41-NEXT: pxor %xmm1, %xmm2
|
||||
; SSE41-NEXT: pminud %xmm2, %xmm0
|
||||
; SSE41-NEXT: paddd %xmm1, %xmm0
|
||||
; SSE41-NEXT: retq
|
||||
; SSE4-LABEL: unsigned_sat_variable_v4i32_using_min:
|
||||
; SSE4: # %bb.0:
|
||||
; SSE4-NEXT: pcmpeqd %xmm2, %xmm2
|
||||
; SSE4-NEXT: pxor %xmm1, %xmm2
|
||||
; SSE4-NEXT: pminud %xmm2, %xmm0
|
||||
; SSE4-NEXT: paddd %xmm1, %xmm0
|
||||
; SSE4-NEXT: retq
|
||||
%noty = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
|
||||
%c = icmp ult <4 x i32> %x, %noty
|
||||
%s = select <4 x i1> %c, <4 x i32> %x, <4 x i32> %noty
|
||||
|
|
@ -780,17 +849,17 @@ define <4 x i32> @unsigned_sat_variable_v4i32_using_cmp_sum(<4 x i32> %x, <4 x i
|
|||
; SSE2-NEXT: por %xmm1, %xmm0
|
||||
; SSE2-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: unsigned_sat_variable_v4i32_using_cmp_sum:
|
||||
; SSE41: # %bb.0:
|
||||
; SSE41-NEXT: paddd %xmm0, %xmm1
|
||||
; SSE41-NEXT: movdqa %xmm0, %xmm2
|
||||
; SSE41-NEXT: pminud %xmm1, %xmm2
|
||||
; SSE41-NEXT: pcmpeqd %xmm0, %xmm2
|
||||
; SSE41-NEXT: pcmpeqd %xmm0, %xmm0
|
||||
; SSE41-NEXT: pxor %xmm0, %xmm2
|
||||
; SSE41-NEXT: por %xmm1, %xmm2
|
||||
; SSE41-NEXT: movdqa %xmm2, %xmm0
|
||||
; SSE41-NEXT: retq
|
||||
; SSE4-LABEL: unsigned_sat_variable_v4i32_using_cmp_sum:
|
||||
; SSE4: # %bb.0:
|
||||
; SSE4-NEXT: paddd %xmm0, %xmm1
|
||||
; SSE4-NEXT: movdqa %xmm0, %xmm2
|
||||
; SSE4-NEXT: pminud %xmm1, %xmm2
|
||||
; SSE4-NEXT: pcmpeqd %xmm0, %xmm2
|
||||
; SSE4-NEXT: pcmpeqd %xmm0, %xmm0
|
||||
; SSE4-NEXT: pxor %xmm0, %xmm2
|
||||
; SSE4-NEXT: por %xmm1, %xmm2
|
||||
; SSE4-NEXT: movdqa %xmm2, %xmm0
|
||||
; SSE4-NEXT: retq
|
||||
%a = add <4 x i32> %x, %y
|
||||
%c = icmp ugt <4 x i32> %x, %a
|
||||
%r = select <4 x i1> %c, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> %a
|
||||
|
|
@ -808,17 +877,17 @@ define <4 x i32> @unsigned_sat_variable_v4i32_using_cmp_notval(<4 x i32> %x, <4
|
|||
; SSE2-NEXT: por %xmm2, %xmm0
|
||||
; SSE2-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: unsigned_sat_variable_v4i32_using_cmp_notval:
|
||||
; SSE41: # %bb.0:
|
||||
; SSE41-NEXT: pcmpeqd %xmm2, %xmm2
|
||||
; SSE41-NEXT: movdqa %xmm0, %xmm3
|
||||
; SSE41-NEXT: paddd %xmm1, %xmm3
|
||||
; SSE41-NEXT: pxor %xmm2, %xmm1
|
||||
; SSE41-NEXT: pminud %xmm0, %xmm1
|
||||
; SSE41-NEXT: pcmpeqd %xmm1, %xmm0
|
||||
; SSE41-NEXT: pxor %xmm2, %xmm0
|
||||
; SSE41-NEXT: por %xmm3, %xmm0
|
||||
; SSE41-NEXT: retq
|
||||
; SSE4-LABEL: unsigned_sat_variable_v4i32_using_cmp_notval:
|
||||
; SSE4: # %bb.0:
|
||||
; SSE4-NEXT: pcmpeqd %xmm2, %xmm2
|
||||
; SSE4-NEXT: movdqa %xmm0, %xmm3
|
||||
; SSE4-NEXT: paddd %xmm1, %xmm3
|
||||
; SSE4-NEXT: pxor %xmm2, %xmm1
|
||||
; SSE4-NEXT: pminud %xmm0, %xmm1
|
||||
; SSE4-NEXT: pcmpeqd %xmm1, %xmm0
|
||||
; SSE4-NEXT: pxor %xmm2, %xmm0
|
||||
; SSE4-NEXT: por %xmm3, %xmm0
|
||||
; SSE4-NEXT: retq
|
||||
%noty = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
|
||||
%a = add <4 x i32> %x, %y
|
||||
%c = icmp ugt <4 x i32> %x, %noty
|
||||
|
|
@ -869,6 +938,21 @@ define <2 x i64> @unsigned_sat_variable_v2i64_using_min(<2 x i64> %x, <2 x i64>
|
|||
; SSE41-NEXT: paddq %xmm1, %xmm3
|
||||
; SSE41-NEXT: movdqa %xmm3, %xmm0
|
||||
; SSE41-NEXT: retq
|
||||
;
|
||||
; SSE42-LABEL: unsigned_sat_variable_v2i64_using_min:
|
||||
; SSE42: # %bb.0:
|
||||
; SSE42-NEXT: movdqa %xmm0, %xmm2
|
||||
; SSE42-NEXT: pcmpeqd %xmm3, %xmm3
|
||||
; SSE42-NEXT: pxor %xmm1, %xmm3
|
||||
; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [9223372036854775808,9223372036854775808]
|
||||
; SSE42-NEXT: pxor %xmm0, %xmm4
|
||||
; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775807,9223372036854775807]
|
||||
; SSE42-NEXT: pxor %xmm1, %xmm0
|
||||
; SSE42-NEXT: pcmpgtq %xmm4, %xmm0
|
||||
; SSE42-NEXT: blendvpd %xmm0, %xmm2, %xmm3
|
||||
; SSE42-NEXT: paddq %xmm1, %xmm3
|
||||
; SSE42-NEXT: movdqa %xmm3, %xmm0
|
||||
; SSE42-NEXT: retq
|
||||
%noty = xor <2 x i64> %y, <i64 -1, i64 -1>
|
||||
%c = icmp ult <2 x i64> %x, %noty
|
||||
%s = select <2 x i1> %c, <2 x i64> %x, <2 x i64> %noty
|
||||
|
|
@ -877,22 +961,49 @@ define <2 x i64> @unsigned_sat_variable_v2i64_using_min(<2 x i64> %x, <2 x i64>
|
|||
}
|
||||
|
||||
define <2 x i64> @unsigned_sat_variable_v2i64_using_cmp_sum(<2 x i64> %x, <2 x i64> %y) {
|
||||
; ANY-LABEL: unsigned_sat_variable_v2i64_using_cmp_sum:
|
||||
; ANY: # %bb.0:
|
||||
; ANY-NEXT: paddq %xmm0, %xmm1
|
||||
; ANY-NEXT: movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456]
|
||||
; ANY-NEXT: pxor %xmm2, %xmm0
|
||||
; ANY-NEXT: pxor %xmm1, %xmm2
|
||||
; ANY-NEXT: movdqa %xmm0, %xmm3
|
||||
; ANY-NEXT: pcmpgtd %xmm2, %xmm3
|
||||
; ANY-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
|
||||
; ANY-NEXT: pcmpeqd %xmm0, %xmm2
|
||||
; ANY-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
|
||||
; ANY-NEXT: pand %xmm4, %xmm2
|
||||
; ANY-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3]
|
||||
; ANY-NEXT: por %xmm1, %xmm0
|
||||
; ANY-NEXT: por %xmm2, %xmm0
|
||||
; ANY-NEXT: retq
|
||||
; SSE2-LABEL: unsigned_sat_variable_v2i64_using_cmp_sum:
|
||||
; SSE2: # %bb.0:
|
||||
; SSE2-NEXT: paddq %xmm0, %xmm1
|
||||
; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456]
|
||||
; SSE2-NEXT: pxor %xmm2, %xmm0
|
||||
; SSE2-NEXT: pxor %xmm1, %xmm2
|
||||
; SSE2-NEXT: movdqa %xmm0, %xmm3
|
||||
; SSE2-NEXT: pcmpgtd %xmm2, %xmm3
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
|
||||
; SSE2-NEXT: pcmpeqd %xmm0, %xmm2
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
|
||||
; SSE2-NEXT: pand %xmm4, %xmm2
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3]
|
||||
; SSE2-NEXT: por %xmm1, %xmm0
|
||||
; SSE2-NEXT: por %xmm2, %xmm0
|
||||
; SSE2-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: unsigned_sat_variable_v2i64_using_cmp_sum:
|
||||
; SSE41: # %bb.0:
|
||||
; SSE41-NEXT: paddq %xmm0, %xmm1
|
||||
; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456]
|
||||
; SSE41-NEXT: pxor %xmm2, %xmm0
|
||||
; SSE41-NEXT: pxor %xmm1, %xmm2
|
||||
; SSE41-NEXT: movdqa %xmm0, %xmm3
|
||||
; SSE41-NEXT: pcmpgtd %xmm2, %xmm3
|
||||
; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
|
||||
; SSE41-NEXT: pcmpeqd %xmm0, %xmm2
|
||||
; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
|
||||
; SSE41-NEXT: pand %xmm4, %xmm2
|
||||
; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3]
|
||||
; SSE41-NEXT: por %xmm1, %xmm0
|
||||
; SSE41-NEXT: por %xmm2, %xmm0
|
||||
; SSE41-NEXT: retq
|
||||
;
|
||||
; SSE42-LABEL: unsigned_sat_variable_v2i64_using_cmp_sum:
|
||||
; SSE42: # %bb.0:
|
||||
; SSE42-NEXT: paddq %xmm0, %xmm1
|
||||
; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
|
||||
; SSE42-NEXT: pxor %xmm2, %xmm0
|
||||
; SSE42-NEXT: pxor %xmm1, %xmm2
|
||||
; SSE42-NEXT: pcmpgtq %xmm2, %xmm0
|
||||
; SSE42-NEXT: por %xmm1, %xmm0
|
||||
; SSE42-NEXT: retq
|
||||
%a = add <2 x i64> %x, %y
|
||||
%c = icmp ugt <2 x i64> %x, %a
|
||||
%r = select <2 x i1> %c, <2 x i64> <i64 -1, i64 -1>, <2 x i64> %a
|
||||
|
|
@ -900,22 +1011,49 @@ define <2 x i64> @unsigned_sat_variable_v2i64_using_cmp_sum(<2 x i64> %x, <2 x i
|
|||
}
|
||||
|
||||
define <2 x i64> @unsigned_sat_variable_v2i64_using_cmp_notval(<2 x i64> %x, <2 x i64> %y) {
|
||||
; ANY-LABEL: unsigned_sat_variable_v2i64_using_cmp_notval:
|
||||
; ANY: # %bb.0:
|
||||
; ANY-NEXT: movdqa %xmm0, %xmm2
|
||||
; ANY-NEXT: paddq %xmm1, %xmm2
|
||||
; ANY-NEXT: pxor {{.*}}(%rip), %xmm1
|
||||
; ANY-NEXT: pxor {{.*}}(%rip), %xmm0
|
||||
; ANY-NEXT: movdqa %xmm0, %xmm3
|
||||
; ANY-NEXT: pcmpgtd %xmm1, %xmm3
|
||||
; ANY-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
|
||||
; ANY-NEXT: pcmpeqd %xmm1, %xmm0
|
||||
; ANY-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
|
||||
; ANY-NEXT: pand %xmm4, %xmm1
|
||||
; ANY-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3]
|
||||
; ANY-NEXT: por %xmm2, %xmm0
|
||||
; ANY-NEXT: por %xmm1, %xmm0
|
||||
; ANY-NEXT: retq
|
||||
; SSE2-LABEL: unsigned_sat_variable_v2i64_using_cmp_notval:
|
||||
; SSE2: # %bb.0:
|
||||
; SSE2-NEXT: movdqa %xmm0, %xmm2
|
||||
; SSE2-NEXT: paddq %xmm1, %xmm2
|
||||
; SSE2-NEXT: pxor {{.*}}(%rip), %xmm1
|
||||
; SSE2-NEXT: pxor {{.*}}(%rip), %xmm0
|
||||
; SSE2-NEXT: movdqa %xmm0, %xmm3
|
||||
; SSE2-NEXT: pcmpgtd %xmm1, %xmm3
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
|
||||
; SSE2-NEXT: pcmpeqd %xmm1, %xmm0
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
|
||||
; SSE2-NEXT: pand %xmm4, %xmm1
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3]
|
||||
; SSE2-NEXT: por %xmm2, %xmm0
|
||||
; SSE2-NEXT: por %xmm1, %xmm0
|
||||
; SSE2-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: unsigned_sat_variable_v2i64_using_cmp_notval:
|
||||
; SSE41: # %bb.0:
|
||||
; SSE41-NEXT: movdqa %xmm0, %xmm2
|
||||
; SSE41-NEXT: paddq %xmm1, %xmm2
|
||||
; SSE41-NEXT: pxor {{.*}}(%rip), %xmm1
|
||||
; SSE41-NEXT: pxor {{.*}}(%rip), %xmm0
|
||||
; SSE41-NEXT: movdqa %xmm0, %xmm3
|
||||
; SSE41-NEXT: pcmpgtd %xmm1, %xmm3
|
||||
; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
|
||||
; SSE41-NEXT: pcmpeqd %xmm1, %xmm0
|
||||
; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
|
||||
; SSE41-NEXT: pand %xmm4, %xmm1
|
||||
; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3]
|
||||
; SSE41-NEXT: por %xmm2, %xmm0
|
||||
; SSE41-NEXT: por %xmm1, %xmm0
|
||||
; SSE41-NEXT: retq
|
||||
;
|
||||
; SSE42-LABEL: unsigned_sat_variable_v2i64_using_cmp_notval:
|
||||
; SSE42: # %bb.0:
|
||||
; SSE42-NEXT: movdqa %xmm0, %xmm2
|
||||
; SSE42-NEXT: paddq %xmm1, %xmm2
|
||||
; SSE42-NEXT: pxor {{.*}}(%rip), %xmm1
|
||||
; SSE42-NEXT: pxor {{.*}}(%rip), %xmm0
|
||||
; SSE42-NEXT: pcmpgtq %xmm1, %xmm0
|
||||
; SSE42-NEXT: por %xmm2, %xmm0
|
||||
; SSE42-NEXT: retq
|
||||
%noty = xor <2 x i64> %y, <i64 -1, i64 -1>
|
||||
%a = add <2 x i64> %x, %y
|
||||
%c = icmp ugt <2 x i64> %x, %noty
|
||||
|
|
|
|||
Loading…
Reference in New Issue