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Fix an undefined behavior introduces in r247234 

llvm-svn: 247296
This commit is contained in:
Steven Wu 2015-09-10 16:32:28 +00:00
parent 9361d35525
commit e3b1f2b765
1 changed files with 1 additions and 1 deletions
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2
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
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@ -646,7 +646,7 @@ bool AArch64DAGToDAGISel::SelectAddrModeIndexed7S(SDValue N, unsigned Size,
if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) { if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
int64_t RHSC = RHS->getSExtValue(); int64_t RHSC = RHS->getSExtValue();
unsigned Scale = Log2_32(Size); unsigned Scale = Log2_32(Size);
if ((RHSC & (Size - 1)) == 0 && RHSC >= (-0x40 << Scale) && if ((RHSC & (Size - 1)) == 0 && RHSC >= -(0x40 << Scale) &&
RHSC < (0x40 << Scale)) { RHSC < (0x40 << Scale)) {
Base = N.getOperand(0); Base = N.getOperand(0);
if (Base.getOpcode() == ISD::FrameIndex) { if (Base.getOpcode() == ISD::FrameIndex) {