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[X86] Fix machineverifier error on avx512f-256-set0.mir 

Previously the pass ran the entire llc pipeline which caused the IR to be recodegened.

This commit restricts it to just running the postrapseudos pass and checking the results of that instead of the final assembly.

llvm-svn: 361991
This commit is contained in:
Craig Topper 2019-05-29 17:02:27 +00:00
parent f80c4241b3
commit e3a76fa1e2
1 changed files with 8 additions and 3 deletions
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11
llvm/test/CodeGen/X86/avx512f-256-set0.mir
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@ -1,8 +1,9 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=x86_64-- -mattr=+avx512f -o - %s -run-pass=postrapseudos -verify-machineinstrs | FileCheck %s
# Test that we emit VPXORD with ZMM registers instead of YMM
# registers when we do not have VLX.
#
# RUN: llc -mtriple=x86_64-- -mattr=+avx512f -o - %s | FileCheck %s
# CHECK: vpxord %zmm16, %zmm16, %zmm16
--- |
; ModuleID = 'test.ll'
source_filename = "test.ll"
@ -59,6 +60,10 @@ constants: []
machineFunctionInfo: {}
body: |
bb.0.bb0:
; CHECK-LABEL: name: main
; CHECK: $zmm16 = VPXORDZrr undef $zmm16, undef $zmm16
; CHECK: VMOVAPSZmr $rip, 1, $noreg, @tst_, $noreg, killed renamable $zmm16 :: (store 32 into %ir.lsr.iv1, align 64)
; CHECK: RET 0
renamable $ymm16 = AVX512_256_SET0
VMOVAPSZmr $rip, 1, $noreg, @tst_, $noreg, killed renamable $zmm16 :: (store 32 into %ir.lsr.iv1, align 64)
RET 0