forked from OSchip/llvm-project
[NFC] Add tests for scalable vectorization of loops with large stride acesses
This patch just adds tests that we can vectorize loop such as these:
for (i = 0; i < n; i++)
dst[i * 7] += 1;
and
for (i = 0; i < n; i++)
if (cond[i])
dst[i * 7] += 1;
using scalable vectors, where we expect to use gathers and scatters in the
vectorized loop. The vector of pointers used for the gather is identical
to those used for the scatter so there should be no memory dependences.
Tests are added here:
Transforms/LoopVectorize/AArch64/sve-large-strides.ll
Differential Revision: https://reviews.llvm.org/D99192
This commit is contained in:
David Sherwood
parent
dc537158d5
commit
e3a13304fc
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@ -0,0 +1,101 @@
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; RUN: opt -mtriple aarch64-linux-gnu -mattr=+sve -loop-vectorize -dce -instcombine -S <%s | FileCheck %s
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define void @stride7_i32(i32* noalias nocapture %dst, i64 %n) {
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; CHECK-LABEL: @stride7_i32(
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; CHECK: vector.body
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; CHECK: %[[VEC_IND:.*]] = phi <vscale x 4 x i64> [ %{{.*}}, %vector.ph ], [ %{{.*}}, %vector.body ]
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; CHECK-NEXT: %[[PTR_INDICES:.*]] = mul nuw nsw <vscale x 4 x i64> %[[VEC_IND]], shufflevector (<vscale x 4 x i64> insertelement (<vscale x 4 x i64> poison, i64 7, i32 0), <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer)
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; CHECK-NEXT: %[[PTRS:.*]] = getelementptr inbounds i32, i32* %dst, <vscale x 4 x i64> %[[PTR_INDICES]]
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; CHECK-NEXT: %[[GLOAD:.*]] = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> %[[PTRS]]
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; CHECK-NEXT: %[[VALS:.*]] = add nsw <vscale x 4 x i32> %[[GLOAD]],
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; CHECK-NEXT: call void @llvm.masked.scatter.nxv4i32.nxv4p0i32(<vscale x 4 x i32> %[[VALS]], <vscale x 4 x i32*> %[[PTRS]]
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entry:
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br label %for.body
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for.body: ; preds = %entry, %for.body
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%i.05 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
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%mul = mul nuw nsw i64 %i.05, 7
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%arrayidx = getelementptr inbounds i32, i32* %dst, i64 %mul
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%0 = load i32, i32* %arrayidx, align 4
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%add = add nsw i32 %0, 3
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store i32 %add, i32* %arrayidx, align 4
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%inc = add nuw nsw i64 %i.05, 1
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%exitcond.not = icmp eq i64 %inc, %n
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br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0
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for.end: ; preds = %for.end.loopexit, %entry
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ret void
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}
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define void @stride7_f64(double* noalias nocapture %dst, i64 %n) {
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; CHECK-LABEL: @stride7_f64(
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; CHECK: vector.body
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; CHECK: %[[VEC_IND:.*]] = phi <vscale x 2 x i64> [ %{{.*}}, %vector.ph ], [ %{{.*}}, %vector.body ]
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; CHECK-NEXT: %[[PTR_INDICES:.*]] = mul nuw nsw <vscale x 2 x i64> %[[VEC_IND]], shufflevector (<vscale x 2 x i64> insertelement (<vscale x 2 x i64> poison, i64 7, i32 0), <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer)
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; CHECK-NEXT: %[[PTRS:.*]] = getelementptr inbounds double, double* %dst, <vscale x 2 x i64> %[[PTR_INDICES]]
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; CHECK-NEXT: %[[GLOAD:.*]] = call <vscale x 2 x double> @llvm.masked.gather.nxv2f64.nxv2p0f64(<vscale x 2 x double*> %[[PTRS]],
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; CHECK-NEXT: %[[VALS:.*]] = fadd <vscale x 2 x double> %[[GLOAD]],
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; CHECK-NEXT: call void @llvm.masked.scatter.nxv2f64.nxv2p0f64(<vscale x 2 x double> %[[VALS]], <vscale x 2 x double*> %[[PTRS]],
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entry:
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br label %for.body
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for.body: ; preds = %entry, %for.body
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%i.05 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
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%mul = mul nuw nsw i64 %i.05, 7
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%arrayidx = getelementptr inbounds double, double* %dst, i64 %mul
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%0 = load double, double* %arrayidx, align 8
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%add = fadd double %0, 1.000000e+00
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store double %add, double* %arrayidx, align 8
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%inc = add nuw nsw i64 %i.05, 1
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%exitcond.not = icmp eq i64 %inc, %n
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br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !6
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for.end: ; preds = %for.end.loopexit, %entry
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ret void
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}
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define void @cond_stride7_f64(double* noalias nocapture %dst, i64* noalias nocapture readonly %cond, i64 %n) {
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; CHECK-LABEL: @cond_stride7_f64(
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; CHECK: vector.body
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; CHECK: %[[MASK:.*]] = icmp ne <vscale x 2 x i64>
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; CHECK: %[[PTRS:.*]] = getelementptr inbounds double, double* %dst, <vscale x 2 x i64> %{{.*}}
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; CHECK-NEXT: %[[GLOAD:.*]] = call <vscale x 2 x double> @llvm.masked.gather.nxv2f64.nxv2p0f64(<vscale x 2 x double*> %[[PTRS]], i32 8, <vscale x 2 x i1> %[[MASK]]
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; CHECK-NEXT: %[[VALS:.*]] = fadd <vscale x 2 x double> %[[GLOAD]],
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; CHECK-NEXT: call void @llvm.masked.scatter.nxv2f64.nxv2p0f64(<vscale x 2 x double> %[[VALS]], <vscale x 2 x double*> %[[PTRS]], i32 8, <vscale x 2 x i1> %[[MASK]])
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entry:
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br label %for.body
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for.body: ; preds = %entry, %for.inc
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%i.07 = phi i64 [ %inc, %for.inc ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds i64, i64* %cond, i64 %i.07
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%0 = load i64, i64* %arrayidx, align 8
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%tobool.not = icmp eq i64 %0, 0
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br i1 %tobool.not, label %for.inc, label %if.then
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if.then: ; preds = %for.body
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%mul = mul nsw i64 %i.07, 7
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%arrayidx1 = getelementptr inbounds double, double* %dst, i64 %mul
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%1 = load double, double* %arrayidx1, align 8
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%add = fadd double %1, 1.000000e+00
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store double %add, double* %arrayidx1, align 8
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br label %for.inc
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for.inc: ; preds = %for.body, %if.then
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%inc = add nuw nsw i64 %i.07, 1
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%exitcond.not = icmp eq i64 %inc, %n
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br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !6
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for.end: ; preds = %for.end.loopexit, %entry
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ret void
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}
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!0 = distinct !{!0, !1, !2, !3, !4, !5}
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!1 = !{!"llvm.loop.mustprogress"}
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!2 = !{!"llvm.loop.vectorize.width", i32 4}
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!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
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!4 = !{!"llvm.loop.interleave.count", i32 1}
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!5 = !{!"llvm.loop.vectorize.enable", i1 true}
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!6 = distinct !{!6, !1, !7, !3, !4, !5}
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!7 = !{!"llvm.loop.vectorize.width", i32 2}
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