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PPC: Mark vector FREM as Expand by default 

Another bug found by llvm-stress! This fixes crashing with:
  LLVM ERROR: Cannot select: v4f32 = frem ...

llvm-svn: 185840
This commit is contained in:
Hal Finkel 2013-07-08 17:30:25 +00:00
parent 6f33168bb7
commit e39302258e
2 changed files with 9 additions and 0 deletions
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1
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -392,6 +392,7 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
setOperationAction(ISD::UDIV, VT, Expand);
setOperationAction(ISD::UREM, VT, Expand);
setOperationAction(ISD::FDIV, VT, Expand);
setOperationAction(ISD::FREM, VT, Expand);
setOperationAction(ISD::FNEG, VT, Expand);
setOperationAction(ISD::FSQRT, VT, Expand);
setOperationAction(ISD::FLOG, VT, Expand);

8
llvm/test/CodeGen/PowerPC/vector.ll
View File

@ -59,6 +59,14 @@ define void @test_div(%f8* %P, %f8* %Q, %f8* %S) {
ret void
}
define void @test_rem(%f8* %P, %f8* %Q, %f8* %S) {
%p = load %f8* %P ; <%f8> [#uses=1]
%q = load %f8* %Q ; <%f8> [#uses=1]
%R = frem %f8 %p, %q ; <%f8> [#uses=1]
store %f8 %R, %f8* %S
ret void
}
;;; TEST VECTOR CONSTRUCTS
define void @test_cst(%f4* %P, %f4* %S) {