forked from OSchip/llvm-project
parent
7641cf8e4d
commit
e372826523
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@ -385,25 +385,6 @@ SDNode *AlphaDAGToDAGISel::Select(SDValue Op) {
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}
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break;
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case ISD::SELECT:
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if (N->getValueType(0).isFloatingPoint() &&
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(N->getOperand(0).getOpcode() != ISD::SETCC ||
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!N->getOperand(0).getOperand(1).getValueType().isFloatingPoint())) {
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//This should be the condition not covered by the Patterns
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//FIXME: Don't have SelectCode die, but rather return something testable
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// so that things like this can be caught in fall though code
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//move int to fp
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bool isDouble = N->getValueType(0) == MVT::f64;
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SDValue cond = N->getOperand(0);
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SDValue TV = N->getOperand(1);
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SDValue FV = N->getOperand(2);
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SDNode* LD = CurDAG->getTargetNode(Alpha::ITOFT, dl, MVT::f64, cond);
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return CurDAG->getTargetNode(isDouble?Alpha::FCMOVNET:Alpha::FCMOVNES,
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dl, MVT::f64, FV, TV, SDValue(LD,0));
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}
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break;
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case ISD::AND: {
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ConstantSDNode* SC = NULL;
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ConstantSDNode* MC = NULL;
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@ -702,7 +702,7 @@ def FCMOVNET : FPForm<0x17, 0x02B, "fcmovne $RCOND,$RTRUE,$RDEST", [], s_fcmov>;
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//misc FP selects
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//Select double
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def : Pat<(select (seteq F8RC:$RA, F8RC:$RB), F8RC:$st, F8RC:$sf),
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(FCMOVNET F8RC:$sf, F8RC:$st, (CMPTEQ F8RC:$RA, F8RC:$RB))>;
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def : Pat<(select (setoeq F8RC:$RA, F8RC:$RB), F8RC:$st, F8RC:$sf),
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@ -791,12 +791,14 @@ def : Pat<(select (setule F8RC:$RA, F8RC:$RB), F4RC:$st, F4RC:$sf),
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let OutOperandList = (ops GPRC:$RC), InOperandList = (ops F4RC:$RA), Fb = 31 in
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def FTOIS : FPForm<0x1C, 0x078, "ftois $RA,$RC",[], s_ftoi>; //Floating to integer move, S_floating
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def FTOIS : FPForm<0x1C, 0x078, "ftois $RA,$RC",
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[(set GPRC:$RC, (bitconvert F4RC:$RA))], s_ftoi>; //Floating to integer move, S_floating
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let OutOperandList = (ops GPRC:$RC), InOperandList = (ops F8RC:$RA), Fb = 31 in
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def FTOIT : FPForm<0x1C, 0x070, "ftoit $RA,$RC",
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[(set GPRC:$RC, (bitconvert F8RC:$RA))], s_ftoi>; //Floating to integer move
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let OutOperandList = (ops F4RC:$RC), InOperandList = (ops GPRC:$RA), Fb = 31 in
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def ITOFS : FPForm<0x14, 0x004, "itofs $RA,$RC",[], s_itof>; //Integer to floating move, S_floating
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def ITOFS : FPForm<0x14, 0x004, "itofs $RA,$RC",
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[(set F4RC:$RC, (bitconvert GPRC:$RA))], s_itof>; //Integer to floating move, S_floating
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let OutOperandList = (ops F8RC:$RC), InOperandList = (ops GPRC:$RA), Fb = 31 in
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def ITOFT : FPForm<0x14, 0x024, "itoft $RA,$RC",
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[(set F8RC:$RC, (bitconvert GPRC:$RA))], s_itof>; //Integer to floating move
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@ -818,6 +820,10 @@ let OutOperandList = (ops F4RC:$RC), InOperandList = (ops F8RC:$RB), Fa = 31 in
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def CVTTS : FPForm<0x16, 0x7AC, "cvtts/sui $RB,$RC",
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[(set F4RC:$RC, (fround F8RC:$RB))], s_fadd>;
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def : Pat<(select GPRC:$RC, F8RC:$st, F8RC:$sf),
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(f64 (FCMOVEQT F8RC:$st, F8RC:$sf, (ITOFT GPRC:$RC)))>;
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def : Pat<(select GPRC:$RC, F4RC:$st, F4RC:$sf),
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(f32 (FCMOVEQS F4RC:$st, F4RC:$sf, (ITOFT GPRC:$RC)))>;
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/////////////////////////////////////////////////////////
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//Branching
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