forked from OSchip/llvm-project
parent
7caa135677
commit
e370147b8c
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@ -268,8 +268,9 @@ static void printOperand(X86AsmPrinter &P, const MachineInstr *MI,
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}
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}
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}
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}
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void X86AsmPrinter::printLeaMemReference(const MachineInstr *MI, unsigned Op,
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static void printLeaMemReference(X86AsmPrinter &P, const MachineInstr *MI,
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raw_ostream &O, const char *Modifier) {
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unsigned Op, raw_ostream &O,
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const char *Modifier = NULL) {
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const MachineOperand &BaseReg = MI->getOperand(Op);
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const MachineOperand &BaseReg = MI->getOperand(Op);
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const MachineOperand &IndexReg = MI->getOperand(Op+2);
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const MachineOperand &IndexReg = MI->getOperand(Op+2);
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const MachineOperand &DispSpec = MI->getOperand(Op+3);
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const MachineOperand &DispSpec = MI->getOperand(Op+3);
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@ -290,7 +291,7 @@ void X86AsmPrinter::printLeaMemReference(const MachineInstr *MI, unsigned Op,
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} else {
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} else {
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assert(DispSpec.isGlobal() || DispSpec.isCPI() ||
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assert(DispSpec.isGlobal() || DispSpec.isCPI() ||
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DispSpec.isJTI() || DispSpec.isSymbol());
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DispSpec.isJTI() || DispSpec.isSymbol());
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printSymbolOperand(*this, MI->getOperand(Op+3), O);
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printSymbolOperand(P, MI->getOperand(Op+3), O);
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}
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}
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if (Modifier && strcmp(Modifier, "H") == 0)
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if (Modifier && strcmp(Modifier, "H") == 0)
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@ -302,11 +303,11 @@ void X86AsmPrinter::printLeaMemReference(const MachineInstr *MI, unsigned Op,
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O << '(';
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O << '(';
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if (HasBaseReg)
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if (HasBaseReg)
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printOperand(*this, MI, Op, O, Modifier);
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printOperand(P, MI, Op, O, Modifier);
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if (IndexReg.getReg()) {
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if (IndexReg.getReg()) {
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O << ',';
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O << ',';
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printOperand(*this, MI, Op+2, O, Modifier);
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printOperand(P, MI, Op+2, O, Modifier);
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unsigned ScaleVal = MI->getOperand(Op+1).getImm();
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unsigned ScaleVal = MI->getOperand(Op+1).getImm();
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if (ScaleVal != 1)
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if (ScaleVal != 1)
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O << ',' << ScaleVal;
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O << ',' << ScaleVal;
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@ -315,20 +316,22 @@ void X86AsmPrinter::printLeaMemReference(const MachineInstr *MI, unsigned Op,
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}
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}
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}
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}
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void X86AsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op,
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static void printMemReference(X86AsmPrinter &P, const MachineInstr *MI,
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raw_ostream &O, const char *Modifier) {
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unsigned Op, raw_ostream &O,
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const char *Modifier = NULL) {
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assert(isMem(MI, Op) && "Invalid memory reference!");
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assert(isMem(MI, Op) && "Invalid memory reference!");
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const MachineOperand &Segment = MI->getOperand(Op+4);
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const MachineOperand &Segment = MI->getOperand(Op+4);
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if (Segment.getReg()) {
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if (Segment.getReg()) {
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printOperand(*this, MI, Op+4, O, Modifier);
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printOperand(P, MI, Op+4, O, Modifier);
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O << ':';
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O << ':';
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}
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}
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printLeaMemReference(MI, Op, O, Modifier);
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printLeaMemReference(P, MI, Op, O, Modifier);
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}
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}
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void X86AsmPrinter::printIntelMemReference(const MachineInstr *MI, unsigned Op,
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static void printIntelMemReference(X86AsmPrinter &P, const MachineInstr *MI,
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raw_ostream &O, const char *Modifier,
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unsigned Op, raw_ostream &O,
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unsigned AsmVariant){
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const char *Modifier = NULL,
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unsigned AsmVariant = 1) {
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const MachineOperand &BaseReg = MI->getOperand(Op);
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const MachineOperand &BaseReg = MI->getOperand(Op);
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unsigned ScaleVal = MI->getOperand(Op+1).getImm();
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unsigned ScaleVal = MI->getOperand(Op+1).getImm();
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const MachineOperand &IndexReg = MI->getOperand(Op+2);
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const MachineOperand &IndexReg = MI->getOperand(Op+2);
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@ -337,7 +340,7 @@ void X86AsmPrinter::printIntelMemReference(const MachineInstr *MI, unsigned Op,
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// If this has a segment register, print it.
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// If this has a segment register, print it.
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if (SegReg.getReg()) {
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if (SegReg.getReg()) {
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printOperand(*this, MI, Op+4, O, Modifier, AsmVariant);
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printOperand(P, MI, Op+4, O, Modifier, AsmVariant);
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O << ':';
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O << ':';
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}
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}
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@ -345,7 +348,7 @@ void X86AsmPrinter::printIntelMemReference(const MachineInstr *MI, unsigned Op,
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bool NeedPlus = false;
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bool NeedPlus = false;
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if (BaseReg.getReg()) {
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if (BaseReg.getReg()) {
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printOperand(*this, MI, Op, O, Modifier, AsmVariant);
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printOperand(P, MI, Op, O, Modifier, AsmVariant);
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NeedPlus = true;
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NeedPlus = true;
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}
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}
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@ -353,13 +356,13 @@ void X86AsmPrinter::printIntelMemReference(const MachineInstr *MI, unsigned Op,
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if (NeedPlus) O << " + ";
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if (NeedPlus) O << " + ";
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if (ScaleVal != 1)
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if (ScaleVal != 1)
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O << ScaleVal << '*';
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O << ScaleVal << '*';
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printOperand(*this, MI, Op+2, O, Modifier, AsmVariant);
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printOperand(P, MI, Op+2, O, Modifier, AsmVariant);
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NeedPlus = true;
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NeedPlus = true;
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}
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}
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if (!DispSpec.isImm()) {
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if (!DispSpec.isImm()) {
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if (NeedPlus) O << " + ";
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if (NeedPlus) O << " + ";
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printOperand(*this, MI, Op+3, O, Modifier, AsmVariant);
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printOperand(P, MI, Op+3, O, Modifier, AsmVariant);
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} else {
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} else {
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int64_t DispVal = DispSpec.getImm();
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int64_t DispVal = DispSpec.getImm();
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if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) {
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if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) {
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@ -377,8 +380,8 @@ void X86AsmPrinter::printIntelMemReference(const MachineInstr *MI, unsigned Op,
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O << ']';
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O << ']';
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}
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}
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bool X86AsmPrinter::printAsmMRegister(const MachineOperand &MO, char Mode,
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static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO,
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raw_ostream &O) {
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char Mode, raw_ostream &O) {
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unsigned Reg = MO.getReg();
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unsigned Reg = MO.getReg();
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switch (Mode) {
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switch (Mode) {
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default: return true; // Unknown mode.
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default: return true; // Unknown mode.
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@ -461,7 +464,7 @@ bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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case 'k': // Print SImode register
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case 'k': // Print SImode register
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case 'q': // Print DImode register
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case 'q': // Print DImode register
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if (MO.isReg())
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if (MO.isReg())
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return printAsmMRegister(MO, ExtraCode[0], O);
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return printAsmMRegister(*this, MO, ExtraCode[0], O);
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printOperand(*this, MI, OpNo, O);
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printOperand(*this, MI, OpNo, O);
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return false;
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return false;
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@ -489,7 +492,7 @@ bool X86AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
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const char *ExtraCode,
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const char *ExtraCode,
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raw_ostream &O) {
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raw_ostream &O) {
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if (AsmVariant) {
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if (AsmVariant) {
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printIntelMemReference(MI, OpNo, O);
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printIntelMemReference(*this, MI, OpNo, O);
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return false;
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return false;
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}
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}
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@ -506,14 +509,14 @@ bool X86AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
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// These only apply to registers, ignore on mem.
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// These only apply to registers, ignore on mem.
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break;
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break;
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case 'H':
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case 'H':
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printMemReference(MI, OpNo, O, "H");
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printMemReference(*this, MI, OpNo, O, "H");
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return false;
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return false;
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case 'P': // Don't print @PLT, but do print as memory.
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case 'P': // Don't print @PLT, but do print as memory.
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printMemReference(MI, OpNo, O, "no-rip");
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printMemReference(*this, MI, OpNo, O, "no-rip");
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return false;
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return false;
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}
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}
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}
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}
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printMemReference(MI, OpNo, O);
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printMemReference(*this, MI, OpNo, O);
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return false;
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return false;
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}
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}
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@ -55,7 +55,6 @@ class LLVM_LIBRARY_VISIBILITY X86AsmPrinter : public AsmPrinter {
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virtual void EmitInstruction(const MachineInstr *MI) LLVM_OVERRIDE;
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virtual void EmitInstruction(const MachineInstr *MI) LLVM_OVERRIDE;
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bool printAsmMRegister(const MachineOperand &MO, char Mode, raw_ostream &O);
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virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode,
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unsigned AsmVariant, const char *ExtraCode,
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raw_ostream &OS) LLVM_OVERRIDE;
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raw_ostream &OS) LLVM_OVERRIDE;
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@ -63,15 +62,6 @@ class LLVM_LIBRARY_VISIBILITY X86AsmPrinter : public AsmPrinter {
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unsigned AsmVariant, const char *ExtraCode,
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unsigned AsmVariant, const char *ExtraCode,
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raw_ostream &OS) LLVM_OVERRIDE;
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raw_ostream &OS) LLVM_OVERRIDE;
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void printMemReference(const MachineInstr *MI, unsigned Op, raw_ostream &O,
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const char *Modifier=NULL);
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void printLeaMemReference(const MachineInstr *MI, unsigned Op, raw_ostream &O,
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const char *Modifier=NULL);
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void printIntelMemReference(const MachineInstr *MI, unsigned Op,
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raw_ostream &O, const char *Modifier=NULL,
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unsigned AsmVariant = 1);
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virtual bool runOnMachineFunction(MachineFunction &F) LLVM_OVERRIDE;
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virtual bool runOnMachineFunction(MachineFunction &F) LLVM_OVERRIDE;
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};
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};
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