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ARM: make sure we use all entries in a vector before forming a vpaddl. 

Otherwise there's some mismatch, and we'll either form an illegal type or an
illegal node.

Thanks to Eli Friedman for pointing out the problem with my original solution.

llvm-svn: 301036
This commit is contained in:
Tim Northover 2017-04-21 20:35:52 +00:00
parent 8ce1d4cbe1
commit e31cf3f824
2 changed files with 14 additions and 5 deletions
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10
llvm/lib/Target/ARM/ARMISelLowering.cpp
View File

@ -9480,11 +9480,11 @@ AddCombineBUILD_VECTORToVPADDL(SDNode *N, SDValue N0, SDValue N1,
return SDValue(); return SDValue();
} }
// Don't generate vpaddl+vmovn; we'll match it to vpadd later. Also don't try // Don't generate vpaddl+vmovn; we'll match it to vpadd later. Also make sure
// to handle an i8 -> i32 situation (or similar). vpaddl can only double the // we're using the entire input vector, otherwise there's a size/legality
// size. // mismatch somewhere.
if (2 * Vec.getValueType().getVectorElementType().getSizeInBits() != if (nextIndex != Vec.getValueType().getVectorNumElements() ||
VT.getVectorElementType().getSizeInBits()) Vec.getValueType().getVectorElementType() == VT.getVectorElementType())
return SDValue(); return SDValue();
// Create VPADDL node. // Create VPADDL node.

9
llvm/test/CodeGen/ARM/vpadd.ll
View File

@ -495,6 +495,15 @@ define <2 x i8> @fromExtendingExtractVectorElt_2i8(<8 x i8> %in) {
ret <2 x i8> %x ret <2 x i8> %x
} }
define <2 x i16> @fromExtendingExtractVectorElt_2i16(<8 x i16> %in) {
; CHECK-LABEL: fromExtendingExtractVectorElt_2i16:
; CHECK: vadd.i32
%tmp1 = shufflevector <8 x i16> %in, <8 x i16> undef, <2 x i32> <i32 0, i32 2>
%tmp2 = shufflevector <8 x i16> %in, <8 x i16> undef, <2 x i32> <i32 1, i32 3>
%x = add <2 x i16> %tmp2, %tmp1
ret <2 x i16> %x
}
declare <4 x i16> @llvm.arm.neon.vpaddls.v4i16.v8i8(<8 x i8>) nounwind readnone declare <4 x i16> @llvm.arm.neon.vpaddls.v4i16.v8i8(<8 x i8>) nounwind readnone
declare <2 x i32> @llvm.arm.neon.vpaddls.v2i32.v4i16(<4 x i16>) nounwind readnone declare <2 x i32> @llvm.arm.neon.vpaddls.v2i32.v4i16(<4 x i16>) nounwind readnone