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Don't need the extra register here. 

llvm-svn: 111864
This commit is contained in:
Eric Christopher 2010-08-23 23:28:04 +00:00
parent b268a282a4
commit e3107d6283
1 changed files with 4 additions and 6 deletions
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10
llvm/lib/Target/ARM/ARMFastISel.cpp
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@ -370,23 +370,21 @@ bool ARMFastISel::ARMSelectLoad(const Instruction *I) {
// Since the offset may be too large for the load instruction
// get the reg+offset into a register.
// TODO: Optimize this somewhat.
// FIXME: There is more than one register class in the world...
unsigned ScratchReg
= FuncInfo.MF->getRegInfo().createVirtualRegister(ARM::GPRRegisterClass);
ARMCC::CondCodes Pred = ARMCC::AL;
unsigned PredReg = 0;
if (!AFI->isThumbFunction())
emitARMRegPlusImmediate(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
ScratchReg, Reg, Offset, Pred, PredReg,
Reg, Reg, Offset, Pred, PredReg,
static_cast<const ARMBaseInstrInfo&>(TII));
else {
assert(AFI->isThumb2Function());
emitT2RegPlusImmediate(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
ScratchReg, Reg, Offset, Pred, PredReg,
Reg, Reg, Offset, Pred, PredReg,
static_cast<const ARMBaseInstrInfo&>(TII));
}
// FIXME: There is more than one register class in the world...
unsigned ResultReg = createResultReg(ARM::GPRRegisterClass);
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(ARM::LDR), ResultReg)