forked from OSchip/llvm-project
[NFCI][InstCombine] Move store merging from `visitStoreInst()` into `visitUnconditionalBranchInst()`
Summary: As @nikic is pointing out in https://bugs.llvm.org/show_bug.cgi?id=46680#c5, InstCombine should not have forward instruction scans, so let's move this transform into the proper place. This is pretty much NFCI. Reviewers: nikic, spatel Reviewed By: nikic Subscribers: hiraditya, llvm-commits, nikic Tags: #llvm Differential Revision: https://reviews.llvm.org/D83670
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@ -440,6 +440,7 @@ public:
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Instruction *visitLoadInst(LoadInst &LI);
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Instruction *visitStoreInst(StoreInst &SI);
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Instruction *visitAtomicRMWInst(AtomicRMWInst &SI);
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Instruction *visitUnconditionalBranchInst(BranchInst &BI);
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Instruction *visitBranchInst(BranchInst &BI);
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Instruction *visitFenceInst(FenceInst &FI);
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Instruction *visitSwitchInst(SwitchInst &SI);
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@ -1425,34 +1425,6 @@ Instruction *InstCombiner::visitStoreInst(StoreInst &SI) {
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if (isa<UndefValue>(Val))
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return eraseInstFromFunction(SI);
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auto IsNoopInstrForStoreMerging = [](BasicBlock::iterator BBI) {
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return isa<DbgInfoIntrinsic>(BBI) ||
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(isa<BitCastInst>(BBI) && BBI->getType()->isPointerTy());
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};
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// If this store is the second-to-last instruction in the basic block
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// (excluding debug info and bitcasts of pointers) and if the block ends with
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// an unconditional branch, try to move the store to the successor block.
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BBI = SI.getIterator();
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do {
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++BBI;
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} while (IsNoopInstrForStoreMerging(BBI));
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if (BranchInst *BI = dyn_cast<BranchInst>(BBI))
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if (BI->isUnconditional())
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if (mergeStoreIntoSuccessor(SI)) {
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// Okay, we've managed to do that. Now, let's see if now-second-to-last
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// instruction is also a store that we can also sink.
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BasicBlock::iterator FirstInstr = BBI->getParent()->begin();
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do {
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if (BBI != FirstInstr)
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--BBI;
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} while (BBI != FirstInstr && IsNoopInstrForStoreMerging(BBI));
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if (StoreInst *PrevStore = dyn_cast<StoreInst>(BBI))
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Worklist.add(PrevStore);
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return nullptr;
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}
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return nullptr;
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}
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@ -1462,8 +1434,8 @@ Instruction *InstCombiner::visitStoreInst(StoreInst &SI) {
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/// *P = v1; if () { *P = v2; }
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/// into a phi node with a store in the successor.
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bool InstCombiner::mergeStoreIntoSuccessor(StoreInst &SI) {
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assert(SI.isUnordered() &&
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"This code has not been audited for volatile or ordered store case.");
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if (!SI.isUnordered())
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return false; // This code has not been audited for volatile/ordered case.
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// Check if the successor block has exactly 2 incoming edges.
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BasicBlock *StoreBB = SI.getParent();
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@ -2734,10 +2734,38 @@ Instruction *InstCombiner::visitReturnInst(ReturnInst &RI) {
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return nullptr;
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}
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Instruction *InstCombiner::visitUnconditionalBranchInst(BranchInst &BI) {
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assert(BI.isUnconditional() && "Only for unconditional branches.");
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// If this store is the second-to-last instruction in the basic block
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// (excluding debug info and bitcasts of pointers) and if the block ends with
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// an unconditional branch, try to move the store to the successor block.
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auto GetLastSinkableStore = [](BasicBlock::iterator BBI) {
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auto IsNoopInstrForStoreMerging = [](BasicBlock::iterator BBI) {
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return isa<DbgInfoIntrinsic>(BBI) ||
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(isa<BitCastInst>(BBI) && BBI->getType()->isPointerTy());
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};
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BasicBlock::iterator FirstInstr = BBI->getParent()->begin();
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do {
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if (BBI != FirstInstr)
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--BBI;
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} while (BBI != FirstInstr && IsNoopInstrForStoreMerging(BBI));
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return dyn_cast<StoreInst>(BBI);
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};
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if (StoreInst *SI = GetLastSinkableStore(BasicBlock::iterator(BI)))
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if (mergeStoreIntoSuccessor(*SI))
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return &BI;
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return nullptr;
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}
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Instruction *InstCombiner::visitBranchInst(BranchInst &BI) {
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// Nothing to do about unconditional branches.
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if (BI.isUnconditional())
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return nullptr;
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return visitUnconditionalBranchInst(BI);
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// Change br (not X), label True, label False to: br X, label False, True
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Value *X = nullptr;
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