forked from OSchip/llvm-project
ConstantFold: Fix big shift constant folding
Constant folding for shift IR instructions ignores all bits above 32 of second argument (shift amount). Because of that, some undef results are not recognized and APInt can raise an assert failure if second argument has more than 64 bits. Patch by Paweł Bylica! Differential Revision: http://reviews.llvm.org/D7701 llvm-svn: 232176
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@ -1120,27 +1120,18 @@ Constant *llvm::ConstantFoldBinaryInstruction(unsigned Opcode,
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return ConstantInt::get(CI1->getContext(), C1V | C2V);
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case Instruction::Xor:
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return ConstantInt::get(CI1->getContext(), C1V ^ C2V);
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case Instruction::Shl: {
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uint32_t shiftAmt = C2V.getZExtValue();
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if (shiftAmt < C1V.getBitWidth())
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return ConstantInt::get(CI1->getContext(), C1V.shl(shiftAmt));
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else
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return UndefValue::get(C1->getType()); // too big shift is undef
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}
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case Instruction::LShr: {
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uint32_t shiftAmt = C2V.getZExtValue();
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if (shiftAmt < C1V.getBitWidth())
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return ConstantInt::get(CI1->getContext(), C1V.lshr(shiftAmt));
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else
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return UndefValue::get(C1->getType()); // too big shift is undef
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}
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case Instruction::AShr: {
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uint32_t shiftAmt = C2V.getZExtValue();
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if (shiftAmt < C1V.getBitWidth())
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return ConstantInt::get(CI1->getContext(), C1V.ashr(shiftAmt));
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else
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return UndefValue::get(C1->getType()); // too big shift is undef
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}
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case Instruction::Shl:
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if (C2V.ult(C1V.getBitWidth()))
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return ConstantInt::get(CI1->getContext(), C1V.shl(C2V));
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return UndefValue::get(C1->getType()); // too big shift is undef
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case Instruction::LShr:
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if (C2V.ult(C1V.getBitWidth()))
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return ConstantInt::get(CI1->getContext(), C1V.lshr(C2V));
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return UndefValue::get(C1->getType()); // too big shift is undef
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case Instruction::AShr:
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if (C2V.ult(C1V.getBitWidth()))
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return ConstantInt::get(CI1->getContext(), C1V.ashr(C2V));
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return UndefValue::get(C1->getType()); // too big shift is undef
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}
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}
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@ -0,0 +1,69 @@
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; RUN: opt < %s -constprop -S | FileCheck %s
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; CHECK-LABEL: shift_undef_64
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define void @shift_undef_64(i64* %p) {
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%r1 = lshr i64 -1, 4294967296 ; 2^32
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; CHECK: store i64 undef
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store i64 %r1, i64* %p
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%r2 = ashr i64 -1, 4294967297 ; 2^32 + 1
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; CHECK: store i64 undef
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store i64 %r2, i64* %p
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%r3 = shl i64 -1, 4294967298 ; 2^32 + 2
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; CHECK: store i64 undef
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store i64 %r3, i64* %p
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ret void
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}
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; CHECK-LABEL: shift_undef_65
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define void @shift_undef_65(i65* %p) {
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%r1 = lshr i65 2, 18446744073709551617
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; CHECK: store i65 undef
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store i65 %r1, i65* %p
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%r2 = ashr i65 4, 18446744073709551617
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; CHECK: store i65 undef
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store i65 %r2, i65* %p
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%r3 = shl i65 1, 18446744073709551617
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; CHECK: store i65 undef
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store i65 %r3, i65* %p
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ret void
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}
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; CHECK-LABEL: shift_undef_256
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define void @shift_undef_256(i256* %p) {
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%r1 = lshr i256 2, 18446744073709551617
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; CHECK: store i256 undef
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store i256 %r1, i256* %p
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%r2 = ashr i256 4, 18446744073709551618
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; CHECK: store i256 undef
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store i256 %r2, i256* %p
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%r3 = shl i256 1, 18446744073709551619
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; CHECK: store i256 undef
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store i256 %r3, i256* %p
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ret void
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}
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; CHECK-LABEL: shift_undef_511
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define void @shift_undef_511(i511* %p) {
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%r1 = lshr i511 -1, 1208925819614629174706276 ; 2^80 + 100
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; CHECK: store i511 undef
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store i511 %r1, i511* %p
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%r2 = ashr i511 -2, 1208925819614629174706200
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; CHECK: store i511 undef
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store i511 %r2, i511* %p
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%r3 = shl i511 -3, 1208925819614629174706180
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; CHECK: store i511 undef
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store i511 %r3, i511* %p
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ret void
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}
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